How Low Can You Go?

Ultra-low-power microcontroller technologies may revolutionize new designs.

VDC Research embedded hardware team analysts left Embedded World 2012 with the impression that this is the Year of the Microcontroller based on the level of technology activity in this area. Our panelists provide insight into a range of exciting microcontroller innovations, from wireless connectivity to MEMS integration to ultra-low-power advances that may revolutionize new wearable technologies. See what Ralf Brederlow, MSP430 research and development manager and distinguished member of the Texas Instruments technical staff; Jacko Wilbrink, Atmel product marketing director; and Mike Salas, general manager for MCU products at Silicon Labs have to say.

EECatalog: Mobile design requirements continue to drive demands for smaller, lower-power devices. What technologies are microcontroller vendors implementing to keep up with this evolution?


Ralf Brederlow, Texas Instruments: Form factors are driven by both the silicon area needs of the microcontroller and by the package. One of the benefits of CMOS technology scaling is that cost and form factor come together nicely when moving to a smaller, sub-micron CMOS technology. TI has been investing in wafer scale packaging technology for its MCU products, which will match the package size to the silicon size. The remaining challenge is to keep low power (namely leakage currents) in advanced CMOS process nodes at a reasonable level. To address this challenge, TI has been investing in an ultra-low-power, advanced CMOS process technology for its next generation of microcontroller products.


Jacko Wilbrink, Atmel: System-level integration continues to push microcontroller manufacturers to look beyond the established standards like flash memory and power management. The integration of new technologies in the areas of communication and user interface, such as capacitive touch technology, wireless and power-line communication, might require acquisitions. Several companies have been acquired in the past years, including Quantum and ADD Semiconductor, by market-leading microcontroller vendors. Another technology step towards smaller devices is the use of wafer-level scale packaging.

And, with the migration towards smaller geometry technologies, controlling the impact of the higher leakage current while preserving high performance and fast wake-up from low-power modes is going to be the main challenge for low-power MCUs. Implementation of multiple power domains, low-power retention memories and flip-flops and voltage scaling are becoming standards. On the smaller geometry processes, the cost of functionality is going down and performance up, but the impact on power consumption can be significant. Finding the right balance will make the difference.


Mike Salas, Silicon Labs: Through a combination of innovative mixed-signal circuitry and thoughtfully designed peripherals, there are many different methods for reducing both size and power in microcontroller (MCU) designs. One of the best-known ways commonly used to reduce power is to minimize the internal operating voltage of the MCU. To accomplish this, many MCUs on the market today integrate internal low drop-out regulators (LDOs) on-chip. An LDO, for example, can take a 3.6 V input and regulate the internal voltage of the chip to a lower value, typically 1.8 V or less. In other words, taking a 3.6 V input using a linear regulator with a 1.8 V output results in a 50-percent conversion efficiency.

More advanced 8-bit embedded controllers, contain integrated switching regulators with much higher efficiency than their LDO counterparts. In many cases, these devices can have switching efficiencies as high as 85 percent. This high efficiency has the effect of reducing the total current sourced from the battery and greatly extending battery life for mobile systems.

Other examples for reducing power include “intelligent” analog peripherals that can operate autonomously without the need to interrupt the processor; fast-switching phase-locked loops (PLLs) that allow a designer to dynamically reduce clock speeds to reduce power; extensive wake-up circuitry that can enable a processor to go into extreme deep sleep modes without the need for a real-time clock (RTC), as well as many other similar mixed-signal methods specifically designed to reduce overall device power.

EECatalog: What trends are you seeing in the integration of micro-electromechanical systems (MEMS) with microcontrollers in embedded designs?

Brederlow, Texas Instruments: There is definitely a trend toward the integration of MEMS with silicon ICs. The first step is to combine the micromechanical device with an analog front end and, possibly, a digital interface. These functions naturally come together due to their voltage and area requirements either in a single piece of silicon or in a total system package. Combining these chips with a microcontroller is technically feasible as well, but removes some of the flexibility to integrate other functions to the system. A microcontroller can be re-used in the same system for many other functions including sleep control, non-MEMS-related sensing functions, interfacing and bridging between multiple other devices – just to name a few. Keeping the microcontroller separate can provide smaller and more flexible systems.

Wilbrink, Atmel: The compatibility in technology between MEMS and microcontrollers will determine if it is feasible and cost-effective to go for a single die. Alternatively, multiple dies can be put in the same package to increase system-level integration.

Salas, Silicon Labs: MEMS technology can be used to create different types of sensors such as accelerometers and pressure sensors. These MEMS-based sensors can be combined with MCUs in multichip modules (MCMs) optimized for specific applications, such as tire-pressure monitoring systems (TPMS), which integrate a MEMS pressure sensor, MCU and RF transceiver in a small-footprint module. To that end, it makes sense to develop more integrated solutions that combine MEMS technology with standard CMOS structures.

New developments in MEMS process technology underway today can enable the fabrication of MEMS resonators and sensor structures directly on top of standard CMOS wafers. This approach eliminates the need for boutique semiconductor processing technologies and enables new levels of performance, integration, and size by eliminating the electrical parasitics and packaging issues associated with traditional solutions that co-package a standalone MEMS device with a CMOS-based IC, such as an MCU, on the same monolithic die. Future MCUs that integrate a MEMS-based oscillator as a standard CMOS layer will eliminate the need for external crystal oscillators, thereby reducing system cost, complexity and size while enhancing reliability. Forthcoming MCUs with on-chip MEMS oscillators will provide ideal solutions for a wide range of cost-sensitive, high-volume consumer and embedded applications.

EECatalog: What are some of the challenges in integrating wireless connectivity with low-power microcontrollers?

Brederlow, Texas Instruments: CMOS technology fits well with RF design and small form factor microcontrollers – especially for low-power applications – so there is no technical boundary. The biggest challenge is to reduce RF transmission energy to the absolute minimum needed for the application. Range, and therefore RF output power, is given by the needs of the wireless link and the application. Understanding design needs is necessary, but integrating RF with a microcontroller can help developers optimize their application.

Salas, Silicon Labs: A relatively new class of device in the embedded market is the wireless microcontroller, which combines an MCU with an RF transceiver. Building a monolithic CMOS IC that integrates the MCU and radio functions in a single die poses several challenges. A critical design challenge is finding an optimum process technology that is suitable for both the flash memory and processing functions of an MCU as well as RF operation. A single-chip solution may drive an IC designer to pick a process optimized for one of the functions while taking a cost and/or performance hit on the other. Another significant challenge is the impact of the processor’s digital blocks on the transceiver’s RF performance.

In a multichip module (MCM) approach, the impact of noise from the MCU’s digital circuits on the RF frequency spectrum is minimized. Physical distances within the MCM ensure that the MCU’s clock frequencies do not cause spurs and/or blocked channels on the radio. The impact on critical RF specifications such as sensitivity and range is also minimized, ensuring interoperability without compromising radio performance. An MCM approach also provides numerous benefits for hybrid wireless MCU solution including lower power consumption and reduced cost, complexity and BOM count – all achieved while ensuring exceptional RF performance.

EECatalog: What new microcontroller technologies will help developers address ultra-low power application requirements?

Brederlow, Texas Instruments: Ferroelectric random access memory (FRAM). This game-changing technology significantly reduces the most energy-consuming function in a microcontroller – accessing memory data. For example, embedded FRAM technology gives developers up to 100x power savings when writing memory data. This enables not only dramatic power savings, but for example, may make software upgrades completely transparent to the end user.

Wilbrink, Atmel: DMAs, sleep walking and the event system allow peripherals to operate without CPU intervention. Hardware provides lower power than software implementations but takes out some of the flexibility, so is well-suited for established peripherals or high-volume ASSPs. Power-analysis tools will assist the developers to optimize their code for lower power operation.

Salas, Silicon Labs: MCU suppliers can employ three strategies to address ultra-low power applications: Maximize energy transfer efficiency (an approach that is essential for battery-operated systems), reduce time in active mode and minimize power in sleep mode.

Greater efficiency in transferring energy from the battery results in less energy lost as heat dissipation, which reduces system-level power consumption and extends battery life. Some state-of-the-art, ultra-low-power MCUs integrate an on-chip dc-dc buck converter that enables significantly higher efficiency in voltage conversion compared to a linear regulator, resulting in energy transfer efficiencies of up to 85 percent. An on-chip buck converter can supply power not only for the MCU itself but also for other circuits in the system such as an RF transceiver, resulting in not only superior energy efficiency but also lower component count and BOM cost.

Since MCUs use maximum power in active mode, many ultra-low-power MCUs incorporate advanced technologies designed to reduce the time spent in active mode. For example, an on-chip dedicated packet processing engine with hardware acceleration blocks can enable more than a fivefold increase in RF message processing speed, allowing the CPU to remain idle during transactions, thereby reducing active time and the current load on the battery.



Cheryl Berglund Coupé is editor of Her articles have appeared in EE Times, Electronic Business, Microsoft Embedded Review and Windows Developer’s Journal and she has developed presentations for the Embedded Systems Conference and ICSPAT. She has held a variety of production, technical marketing and writing positions within technology companies and agencies in the Northwest.

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