Supported 8-Bit Architectures: MCS51, MCS251
The T80251XC3 core implements a compact 16-bit microcontroller that executes the MCS®251 & MCS®51 instruction sets and includes a configurable range of features and integrated peripherals. The core’s advanced architecture enables a high-performance 8051/80251-compatible MCU in a small silicon footprint. The CPU (including the register files) is smaller than 13,000 gates, and can deliver 0.1455 DMIPS/MHz. This MCU is extremely energy efficient, especially for applications that process 8- or 16-bit data. A small footprint translates to very little power leakage, and having better performance than other 8- or 16-bit MCUs allows clocking at lower frequencies. Users can also adjust the core’s energy consumption to match the processing workload via dynamic frequency scaling and independent control of the CPU and peripherals clocks. Finally, the 80251 ISA’s complex addressing modes minimize the number of load/store operations, which typically comprise 20% or more of a RISC processor’s code. Denser code needs smaller firmware and fewer memory accesses, so the memory subsystem’s energy consumption is very competitive. Optional features and pre-integrated peripherals allow function, performance, and area to be balanced for each specific application. Software development is facilitated by a single-wire or JTAG debugging interface that operates in the ARM® Keil® C251 IDE. Inexpensive debug pods and a complete reference design board package are available.
Features & Benefits
◆ Small Silicon Footprint: CPU is below 13k gates on 180nm; smaller memory footprint due to denser code; ISA Addressing modes minimize load/store operation typically comprising 20%-25% with RISC CPUs.
◆ Energy Efficient: Small area means low leakage & static power; low instruction & data transfer/storage energy due to fewer load/store operations; dynamic frequency scaling.
◆ Configurable Microcontroller: Automatic instantiation of user selectable MCU peripherals; Pre-integration with other CAST IP on request.
◆ Easy Firmware Development: on-chip debug interface supports JTAG and Single-Wire; USB-to-Serial and USB-JTAG, low cost CDP-XC debug pods; Seamless integration with Keil µVision™.
◆ Flexible Memory Architecture: 16MB program and data address space; 64kB stack space; Acknowledged transactions feature makes integration with slow memories or peripherals easy.
◆ Fully compatible with the MCS®251 & MCS®51 instruction sets.
◆ Select among a rich set of pre-integrated and pre-verified peripherals and core configuration options, including Timers/Counters, PCA, Watchdog Timer, CAN, LIN and other Interfaces.
◆ Performance Acceleration & Architectural Options; VDMA Direct Memory Access controller with up to 8 channels; and Power Management Unit.
◆ Cost-effective and Reliable: Simple, royalty-free licensing, backed by the most experienced 8051 IP team in the industry.
◆ Available in Verilog RTL or a targeted FPGA netlist. Deliverables include a behavioral model, automated CRV testbench, comprehensive documentation, and sample synthesis and simulation scripts.
Applications include use as a peripheral microcontroller in complex SoCs, a sensor subsystem MCU in IoT applications, or an embedded processor in mixed-signal ICs.