Embedded Memories Destined for IoT Seek Security/Power Management Balance
Low-power designs that also stand guard against passive, semi-invasive and invasive attacks are evolving to protect the IoT devices found in automotive, wearables, medical, industrial and consumer applications.
As the number of connected devices increases, so do such security risks as malicious software and reverse engineering. At the same time as risks and the rapid adoption of the IoT are gaining attention for security, power management is gaining its fair share of attention, with wireless devices proliferating and consumers continuing to push for more apps and longer battery life.
Embedded memories destined for IoT devices have multiple requirements including low power with instant-on, a small silicon footprint and programmable non-volatile code storage. Most important, they must be highly secure to protect software intellectual property (IP) and prevent hacking.
Non-volatile memory (NVM) currently is found in many forms, such as embedded flash, electrical fuses, multi-time programmable (MTP) and one-time programmable (OTP). These on-chip designs are low-power, configurable, reduce costs, improve performance and enable secure storage and operation.
Protection at the Most Vulnerable Layer
One antifuse OTP technology is an embedded non-volatile memory noted for its security, low-active and standby power (Figure 1). It supports all the proposed requirements for IoT device memory. It cannot be hacked using passive, semi-invasive or invasive methods because of a strong layer of protection at the most vulnerable physical layer. Its bit cell does not store a charge, which means there is no physical evidence of the state of the non-volatile memory bit cell. Instead, the bit determines an initial “0” or programmed “1” through the process of sensing current, not voltage.
|Figure 1: An embedded NVM memory IP is used in a variety of chips for secure storage.|
Passive hacking techniques using current profiles to determine word patterns are unsuccessful. An intruder cannot determine the pattern of the word being read because the bit cell current for “0s” and “1s” is much smaller than the current required for sensing or operating the peripheral circuits in order to read the memory. Invasive techniques, including backside attacks or scanning electron microscopy (SEM) passive voltage contrast, are unsuccessful because it is difficult to isolate the bit cell since it is connected in a cross point array. Moreover, it is nearly impossible to determine which bit is programmed because it is difficult to locate the oxide breakdown using chemical etching or mechanical polishing and by looking at a cross section or top view.
The highest level of security relies on physical security since this is the most vulnerable layer of security in any system. Information programmed into a bit cell provides a high degree of physical security. That is, it cannot be determined through conventional non-invasive, semi- invasive or invasive attacks. This means that system-on-chip (SoC) designers can integrate NVM storage for data protection that will make their system impenetrable to all but organizations not constrained by normal funding or time considerations
A security lock register, bit or memory based on floating-gate NVM technology is inherently vulnerable to an attack from one of the standard methods. Antifuse memory technology offers superior security because it is practically impossible to reverse engineer. The secure antifuse bit cell is implemented for standard logic CMOS process. It also includes a lock feature that assures that the memory is locked and cannot be over-written or further modified by hackers or competitors.
Security risks are unwanted aspects of a connected world. More and more IoT-enabled devices include embedded NVM IP because it reduces the vulnerability of such devices. Low-power and configurable, IoT-enabled devices with embedded NVM IP offer secure storage and operation, reduce costs and improve performance.
Bernd Stamme is vice president of Field Applications Engineering at Kilopass Technology. He has more than 20 years of experience in the IP and semiconductor industry. Prior to Kilopass, he was the director of IP Technology at SiRF Technology, managing the licensing and successful integration of third-party IP into SiRF’s GPS chip sets. Before SiRF, he held management positions in LSI Logic’s CoreWare organization and worked on high-speed SerDes IP, communication interfaces and processor cores. Bernd holds a Dipl.-Ing. degree in Electrical Engineering from FH Bielefeld in Germany.