Unraveling the Implications of the Intel Altera Acquisition: Designing for Tomorrow, Today
Will FPGA programmability give pause to developers considering GPGPUs?
The rapidly evolving world of computing requires Integrated Circuits (ICs) that can continue to keep up with an ever-changing list of demands. From virtualization, storage management, analytics and beyond, software developers and OEMs are constantly balancing the needs of the current landscape with the promise of future technologies.
That’s why Intel®, one of the world’s principal processor manufacturers, recently acquired Altera, a leading company with a 30-year history of supplying the industry with the latest programmable logic, process technologies, IP cores and development tools. This exciting merger has the potential to bring a new dimension of speed and efficiency into the world of information technology.
Paving the Way for IoT Expansion
As one of the top manufacturers of FPGAs, Altera® makes highly programmable chips that allow tasks to be programmed into the IC’s body. The result is chips that can quickly and easily be upgraded, reprogrammed or reconfigured. Used everywhere from automotive infotainment systems to high-end network switches, FPGAs can potentially be used to program any number of specific, specialized tasks into many types of electronics, paving the way for Intel’s continued expansion into the Internet of Things (IoT) market.
FPGAs are also well suited for many cloud-based and specialized high-performance computing applications that are currently implementing general-purpose graphics processing unit (GPGPU) technology. The programmability of FPGAs offers an increasingly attractive performance advantage over GPGPUs—with the potential to impact everything from traditional IT platforms to scientific computing applications that conduct advanced processes such as genome sequencing and seismic analysis.
FPGAs can potentially be used to program any number of specific, specialized tasks into many types of electronics, paving the way for Intel’s continued expansion into the Internet of Things market.
In other words, processors with FPGAs can be much faster, have low latency and are more power-efficient when performing specific workloads.
Programmable Workloads and Programmable Fabrics
Intel and Altera have been working together for many years, creating technology that has stood the test of time. This merger comes at a critical time for Intel, as IT professionals demand a processor whose algorithms can be reprogrammed as fast as the technology parameters evolve. As a result of the acquisition, Altera will move from a manufacturing partner to a vital component of the Intel technology family.
By combining the intellectual property of Altera and Intel, the reality of getting an FPGA much closer to a general-purpose CPU becomes more likely. The two main advantages of this include the potential for programmable workloads and programmable fabrics.
Consider, for example, incorporating FPGAs onto the same die as the central processing unit (CPU) itself. In this scenario, a general-purpose Xeon® class CPU could potentially be paired with a programmable FPGA in the same processor package. Sharing workloads makes it possible to share low-latency cache and the same memory bus. Also enabled: high-speed data transfers between the FPGA and the CPU.
Programmable workloads that can benefit from this type of arrangement include optimized search algorithms, image pattern recognition and encryption acceleration (Figure 1). Because FPGAs can be reprogrammed, IT professionals can also adapt their hardware for new workloads over time as their needs or algorithms change.
The combined technology also has a potential impact for IT professionals who require full general-purpose CPU power and want full high-performance FPGAs. Today, Intel connects CPUs and multi-processor systems via a quick path interconnect (QPI), which features a very low latency CPU-to-CPU fabric interface. With FPGAs now included in the family, Intel could potentially make FPGAs that utilize QPI to communicate directly with Xeon® class processors.
For example, let’s look at a traditional dual-processor server featuring one general-purpose CPU and a second IC that is an FPGA. The CPU and FPGA in this example can share access to the same memory, while also having their own dedicated memory channels—with the potential of each having their own fabrics to connect to external IO. The fabric channel going into the FPGA could offload much of the initial packet processing workload and pass the remaining data to the general-purpose processor for further work.
This is an interesting scenario not only in dual-processor systems, but also in quad-processor systems where there is more freedom to mix programmable workloads with general purpose CPUs. The possibility of four or eight socket systems with different combinations of CPUs and FPGAs featuring QPI has the potential to substantially reduce latency, as well as address many of the issues that slow down FPGAs in general-purpose systems.
Migration to Network Function Virtualization
For software developers and OEMs serving storage, security and communications markets worldwide, the Intel Altera acquisition has several potential implications. An important area that this may have an impact on is virtualization. Intel multicore processors are a key asset in the transition to virtualization (Figure 2).
From a consumer perspective, virtualization offers well-known benefits such as reduced fixed operational costs and capital expenditures. The problem is that many technology providers are trying to capitalize on virtualization technology without drastically increasing their expenses in the process.
As server platforms continuously support more CPU cores and memory, their ability to support more virtual machines (VMs) per platform also increases. Normally as the number of VMs in a data center increases, so does the need for specialized network equipment, such as firewalls, routers and load balancers, to allow these VMs to communicate with each other and the world outside the data center in a reliable, secure manner. Now, however, we are beginning to see a shift from the use of dedicated network equipment to Network Function Virtualization (NFV).
In simple terms, NFV is a concept where a network node, such as a load balancer or router, is virtualized and runs on traditional IT servers in much the same way that a VM is utilized for a general purpose server workload. By combining many network functions on the same physical server platforms as VMs, but logically separating them from their own virtualized workloads, less physical equipment is needed in the data center. This can save capital expense, space and power, as well as increase network uptime via live migration of services from one NFV VM to another.
With FPGAs now included in the family, Intel could potentially make FPGAs that utilize QPI to communicate directly with Xeon class processors.
Since many proposed NFV functions rely on fixed algorithms for things like switching, routing, compression, load balancing and encryption, using FPGA logic to accelerate these functions makes sense, assuming it is available to the host platforms. By combining FPGA logic with general-purpose CPUs, Intel will be well positioned to take advantage of this market shift by allowing data centers to optimize NFV workloads on servers also able to host more generalized VMs.
How can software developers design products and business solutions that solve today’s deployment challenges and increase business efficiencies, while planning for tomorrow’s technological advances? The answer rests in partnering with an application platform and lifecycle support services partner that possesses expertise in solution design, system integration, application management and maintenance services, as well as one that maintains relationships with industry-leading technology providers like Intel. Such a partner understands and can prepare for technological advancements like those promised by the Intel Altera acquisition, and can initiate those changes when the time is right. This partner can provide recommendations for designing sustainable solutions that account for future scenarios, such as processors with FPGA chips, to deliver much faster, low latency and power-efficient IT solutions when the time is right.
Austin Hipes currently serves as the chief technologist and VP Engineering for UNICOM Engineering, a division of UNICOM Global. In this role, he manages UNICOM Engineering’s hardware, software, mechanical, and sales engineering groups, as well as supports sales design activities with key customers. Over the last fourteen years, Austin has been focused on designing systems for telecommunications equipment providers, storage solution providers, and network security companies requiring appliance solutions. He was previously VP of Technology at NEI and Director of Technology at Alliance Systems. Austin studied Electrical Engineering at University of Texas at Dallas.
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