IoT Forcing Architectural Change
As multicore use widens, knowing when to forge fresh architectural alliances is key.
The Internet of Things (IoT) is fueling market demand for multicore processors and pushing hardware suppliers, OEMs, engineering houses and others throughout the embedded ecosystem to re-evaluate their architectural allegiances. More than half of embedded CPUs shipped in 2015 featured a multicore processing configuration, and VDC Research expects multicore products to outgrow single-core processor shipments for embedded microcontrollers (MCUs) and system-on-chips (SoCs) through 2020. Multicore processors are already a staple in areas like communications and networking infrastructure, retail automation, and data storage, but are quickly spreading in automotive, industrial automation, and other embedded applications. This expansion in multicore technology use across the gamut of embedded projects is putting architectures at the front of design and investment decisions.
Benefits and Bugs
Depending on the accompanying software algorithms and implementation, multicore processors can improve response times for some processes or workloads, operate at higher frequencies or achieve greater MIPS/watt through parallelism, lower thermal design power, and save on PCB space, among other potential benefits when compared to single-core configurations. The markets for multicore embedded processors are seeing strong growth as a result of:
- Processor/ECU consolidation in different embedded applications
- Growing application requirements for fanless/mobile systems
- Market saturation of single-core processors
- The growing maturity and capabilities of multicore software development tools and platforms
- Increasing adoption and use of third-party core IP; migration from proprietary architectures
When embarking on an embedded project featuring multicore processors, engineers must contend with new design and technology challenges. For example, adjustments are required for the operating system to enable CPU multithreading and improve application performance. The leading challenge for embedded engineers developing for a multicore processor, particularly if using a proprietary or in-house processing architecture, is mapping parallel software to parallel hardware. That is easier said than done, as developers need to weed out concurrency bugs and ensure that task scheduling and resource partitioning have the parallelism chops to serve the application. As a result, debug, simulation/testing, peer code review and advanced static code analysis tools are critical to multicore design success.
Different Growth Patterns
Beyond the traditional embedded space, the market for consumer mobile devices has propelled the adoption and use of multicore SoCs through the past several years. In turn, this has helped prepare silicon suppliers for the next wave in multicore designs. The wave is stemming from the array of emerging IoT systems implementing heterogeneous architectures, as well as the ramping requirements of traditional applications. This does not mean they are all of equal footing, though, as the surrounding ecosystems for ARM, Intel Architectures, MIPS, and Power have grown in different ways (Figure 1). As a result, many leading embedded processor suppliers have enacted new corporate strategies supporting more than one standard core architecture family while engineering organizations increasingly evaluate alternative hardware architectures.
ARM has generated considerable momentum in recent years, garnering a variety of new IP licensees and ecosystem partners in the embedded market. Since the launch of the Cortex-A50 series in late 2012, ARM has found a number of stewards for its nascent 64-bit IP such as AMD, Broadcom, and STMicroelectronics, and most real-world product rollouts (all of which almost certainly feature a multicore architecture) are launching this year. The Cortex-A50 series processors can be used in ARM’s big.LITTLE heterogeneous computing architecture, which originated with the pairing of the Cortex-A15 and Cortex-A7 cores in late 2011. The unique power-saving big.LITTLE architecture has seen the most use so far within Qualcomm and Samsung chipsets for mobile devices. It’s supported by the big.LITTLE MP open-source software, which handles the allocation of tasks to the appropriate CPU cores. In addition, ARM supports common parallelizing tools such as OpenMP, OpenCL, Renderscript and others.
High-performance multicore CPUs are Intel’s bread-and-butter. The x86 architecture is prevalent within embedded communications and networking infrastructure. Intel is by far the market share leader for embedded CPUs and, as a result, the embedded hardware ecosystem for motherboards and integrated computer systems is radically different than that for discrete merchant processors. Leading embedded boards and systems suppliers such as Advantech, ADLINK, congatec, Dell, Kontron and Supermicro have prominently supported Intel architectures for several years. For multicore development, Intel provides Intel Threading Building Blocks (Intel TBB), which is a C++ template library for task parallelism, the Intel Cilk Plus extension for C and C++ for multicore and vector processing, the multicore accelerator within Wind River Simics 5 for simulating tightly coupled multicore/multiprocessor targets, and more through its broad portfolio of software development tools.
MIPS carved its own niche in the market for high-performance many-core servers and other networking systems. Since the acquisition of MIPS in 2013, Imagination Technologies has posted strong corporate growth while expanding the range and variety of its embedded processing and connectivity IP. The MIPS hardware multithreading architecture allows the allocation of processor cycles to threads, which is then prioritized within an optional Quality of Service (QoS) manager module. Imagination Technologies also provides its interAptiv multiprocessor cores which leverage a nine-stage pipeline with multithreading for highly parallel applications.
The Power architecture lives on primarily as a result of its strength in high-bandwidth integrated systems for long-lifecycle designs in areas such as military/aerospace. IBM, the OpenPOWER Foundation and some hardware vendors such as National Instruments are the chief supporters of Power. Large embedded processor partners such as AppliedMicro, NXP and STMicroelectronics also back the Power architecture. However, as with MIPS, many traditional backers have either been acquired (e.g., LSI Corporation) or expanded their support into the larger ARM ecosystem.
The IoT is forcing embedded engineers and hardware suppliers alike to look to alternative processing architectures to meet new system requirements and connected solution architectures, as well as to remain privy to shared market opportunities tied to each. The development of end-to-end IoT solutions demands cooperation among several corporate entities of different domains and design expertise. Add in the strong growth of embedded systems—big and small—featuring multicore processors, and engineers now have several new considerations when selecting a processing architecture for the next generations of (connected) target systems.
Dan Mandell is a Senior Analyst at VDC Research. Mandell supports a variety of syndicated market research programs and custom engagements in the IoT & Embedded Technology practices. He leads the research services for IoT gateways, embedded processors, and other computing hardware in addition to supporting programs such as embedded/real-time operating systems. Mandell also develops, programs and manages end-user surveys to embedded engineers and uncovers useful and interesting insights regarding buyer behaviors, technology adoption and device/application requirements. His working relationship with VDC dates back to 2005 and includes stints with Business Development as well as the AutoID practice. Dan holds a B.S. in Information Systems Management from Bridgewater State University.