Power Systems Design for Wearables: Life’s No PMIC – Q&A with Silego Technology

Considering an approach to power management that could re-invigorate wearables


Mike Noonen, Silego Technology

Editor’s note:  In late 2016, Silego Technology announced a major expansion of its Configurable Mixed-signal IC family to include power management. With this announcement, designers can create “Flexible Power Islands” to slay the frustration of lengthening battery life for portable devices such as handhelds and wearables. Nathan John and Mike Noonen spoke with EECatalog not long after the announcement. John and Noonen are the company’s Marketing Director, Mixed-signal Matrix Products and WW VP Sales and Business Development, respectively. Edited excerpts from the conversation follow.

EECatalog: What’s needed in the wearables market?

Nathan John, Silego Technology

Nathan John, Silego Technology

Mike Noonen, Silego: I used to be at National Semi, and more than 10 years ago National did a chipset for Microsoft when Microsoft introduced its first smartwatch, SPOT Watch. Nobody remembers it because the battery life lasted all of one day.

Now, fast forward a decade later, and in the more advanced smartwatches the battery life is two days. One of the reasons smartwatches have not taken off to the degree that people had hoped and expected is that it requires care and feeding of a battery that is definitely a gigantic step backward with regard to the maintenance that people have had to put into watches for the past century.

Figure 1: Design challenges for power systems designers. [Image courtesy Silego].

Figure 1: Design challenges for power systems designers. (Image courtesy Silego)

At Silego, we’re approaching the problem and the opportunity in a different way. We believe that for a lot of sensors and the most basic of wearables, what most designers are proposing or doing is overkill, and consumers are frustrated.

However, by using a Configurable Mixed-signal IC—in many cases asynchronous state machines—a lot of functionality can be done at an order of magnitude lower power [compared to] throwing an ARM microprocessor at the problem. Not to say that we can do everything, but we think that innovative solutions like ours are part of attaining the functionality as well as the user experience that customers want. Having to plug something in every night isn’t the answer, nor is or having a form factor that requires a battery that makes the smartwatch less decorative and not very fashionable.

We think this is an opportunity for Silego to re-invigorate wearables, and the customers we’ve engaged with are seeing our solution, our technology, as a step in the right direction to get that longer battery life, small form factor and functionality that users expect.

Nathan John, Silego: Silego has been successful in wearables, but that is not because we have been focused on wearables; it has more to do with the fast pace of the wearables market. Customers in that space have big challenges, and they are inventing new architectures, and—typical of our customers—they are boldly going where nobody has gone before.

We use configurability to allow customers to make solutions their own. In industries that are in the midst of disruption, as wearables is right now, configurability and flexibility are valuable.

EECatalog: What are Flexible Power Islands and why are they needed?

John, Silego: Smartphones and other consumer electronic devices with relatively complex electronics (Figure 1) often have a battery that the manufacturer wants to be large to improve battery life, but at the same time, the physical form factor of the device can’t get bigger.

So, this delicate balancing act occurs: How do you make it last longer and not get bigger, heavier, less portable? Power designers in particular face a host of challenges with small form factor consumer electronic devices.

If the device is a smartphone, among the keep-you-up-at-night problems it presents to power designers are complex board shapes, the clustering of amplifiers and microphones at the edge, and worries about heat. And all that is on top of the battery muscling in on PCB space.

What you’d typically have in the smartphone would be a Power Management IC (PMIC) at the center. With a distance of as little as two inches from the edge though, that PMIC is less effective than power management at the edge, where the microphones, etc. are. The SLG46125M device we’ve introduced can be used as a Flexible Power Island to augment the capabilities of the PMIC. Designers do not have to replace the PMIC or change the device’s fundamental architecture.

EECatalog: You noted that distance from the edge, are there other drawbacks that PMICs have?

John, Silego: One thing about the suppliers that sell these PMICs: They don’t make changes very fast. So often our customers say, “I would love to have my PMIC supplier just make this change for me,” but either the PMIC supplier won’t do it because they expect a really, really high volume to do that, or they say, “Yes, I’ll make that change and I’ll give you that change in six months.”  Whereas we would say, “Hey, take one of our little devices, configure it in a couple of days, drop that on your board, and you’re off and running.”

EECatalog: PMIC suppliers might have reason to look over their shoulders?

John, Silego: Over time we expect to build more devices that will serve in this role of Flexible Power Islands, and the ultimate end game could be for a customer to say, “Well, if I put two of these FPI parts on there, can I remove the PMIC altogether?” That is certainly the long-term vision for how we are attacking this.

EECatalog: What are some of the characteristics of the Flexible Power Islands that support Silego’s being comfortable with taking that long-term vision?

John, Silego: One of the things that we are touting to our customers is that besides getting the ability to perform functions—switching regulation; linear regulation; power gating/slew rate control; control/sequencing /timing; power monitoring; RTC; GPIO—they should now expect to have flexibility as one of the extra added benefits that they might not have had before.

Also, the SLG46125M can capitalize on the full flexibility of our GreenPAK architecture. Customers can mix and match the functions that we supply and do the interconnect so that they can turn it into their own little ASIC. We also supply a set of software that allows them to do that.

So quite literally, our typical design time is a couple of days, and somebody has an ASIC. They can program a few samples of their own to test it out in their system. Next, they supply that as a design file to us, and we say, “How many do you want to buy?” We program it; we test it; we sell it to them as if it was an ASIC.

This particular device has a set of power switches, so not only can you do the control aspects, but you can also switch on and off the different power rails. The SLG46125M device is also small, a 1.6 x 2.0 mm MSTQFN package.

And with regards to long term, we’ll be offering new resources that we don’t offer in this first device, making it possible for designers to have all the functional elements in their power system included in one of our tiny flexible devices.

EECatalog: Some of the frustration designers have been experiencing as devices shrink could be alleviated.

John, Silego: Absolutely, and the frustration will be avoided especially for power systems designers, who feel they get the least attention of anybody—they [traditionally] get the oldest, boring-est technology, so when we tell them these parts are small and flexible, the power systems designers are interested in that.

Figure 2: The blue rectangles represent physical pins; the green wires represent connections. [Image courtesy Silego Technology]

Figure 2: The blue rectangles represent physical pins; the green wires represent connections. (Image courtesy Silego Technology)

EECatalog: What else is in the works?

John, Silego: We want to make our fast design cycles even faster. We want to give customers tools so that they can be more accurate in the development process and do it more easily and at less cost.

To support those goals, we’re enhancing our development tools by including SPICE simulation. The little blue rectangles shown on Figure 2 are the physical pins on the device. Customers cannot only add the functional elements, they can also add the little green wires to connect them all together.

Figure 3: Green circles show simulation test points. (Image courtesy Silego Technology)

Figure 3: Green circles show simulation test points. (Image courtesy Silego Technology)

One way for designers to debug their designs is by downloading that design directly into a part and then testing it out at the physical board level. What we are adding here is a new capability enabling customers to do this is a simulation environment, using SPICE. The little red indicators on Figure 3 are the signals being generated in a simulation world, and then there are little green circles to indicate where the designer has dropped down a simulation test point. It’s possible to view the signals at those various parts in the circuit as it’s running in the simulation environment. Customers gain the ability to quickly assess their design and look for mistakes that they might have made. They can do all the debug steps in a faster and more efficient manner.

Simulation environment debugging is also complementary with our existing debug methodology, which is a hardware-centric model. For each one of their devices, we have a development board, and you can download the capability for your custom solution into that board and then test it out at a hardware level. That certainly won’t go away, but [simulation environment debugging] adds a new parallel methodology.

EECatalog: Does simulation environment debugging save time?

John, Silego: Yes, although we were not taking much of their time in the first place. I mentioned earlier that we have development cycles of a couple of days—that’s from assembling the specifications; designing the circuits; doing debug and testing, and saying, “It’s a done deal.”

We have already given them valuable tools that allow them to do this process quickly. This is just another way to maybe save a couple of hours off the debug process. We are not saving them days and weeks, because we never asked them for days and weeks in the first place.

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