Chip Design Resource Center
Top Stories and News
| New White Papers |
Synopsys White Paper: Understanding the real cost of prototyping hardware
The PSP Model in RF CMOS Design
May Semiconductor Sales Increase 5.4 Percent Month on Month
SAN JOSE, Calif. --(Business Wire)-- Jul 03, 2009 Worldwide sales of semiconductors rose to $16.5 billion...
Market for Green PCs Will Exceed $190 Billion by 2013, According to NextGen Research
Intel Developer Forum to Mix Business with Pleasure
Xilinx Accelerates Development of Next-Generation Systems With Industry's First Deployment of Targeted Design Platforms
46th DAC Announces Power-Scavenging Topic Wins First-Ever Community-Selected Panel Vote
FFT Library from OptNgn Validated for use in Mentor Graphics’ Precision FPGA Synthesis
MIPS32 Processor Powers Innovative DTV Platform From NXP
Research and Markets: Opportunities for x86 in Embedded Processing - 2009 Edition
Intel and Nokia Announce Strategic Relationship to Shape Next Era of Mobile Computing Innovation
Intel, Nokia to Create New Family of Mobile Devices
Featured Articles
FailMapTM A Design and Test Collaboration Tool
Get Composite View of Design and ATE Failure Waveforms! Mask or Fix ATE Failures Automatically! BENEFITS For...
PLL and DLL Hard Macros
True Circuits, Inc. PLL and DLL Hard Macros True Circuits’ complete family of standardized, silicon-proven,...
ZeBu™: A Unified Verification Approach for Hardware Designers and Embedded Software Developers
Table 1. Comparison between ZeBu, best-in-class emulation systems and FPGA-based prototypes Unprecedented...
Noblepeak Vision: IC Design On A Short Learning Curve
How does an IC startup overcome the learning curve of high-end EDA tools NoblePeak...
FSA Promotes Innovation Through Global Collaboration and Dissemination of Valuable Industry Information
FSA, a leading semiconductor trade association, is the voice of the global fabless business model...
Speed Analog/Mixed-Signal IC Designs to Silicon
At most companies, the engineering department selects tools based on its own criteria...
EVE introduces ZeBu™:
Moore's law continues to drive both chip complexity and performance to new highs every...
Featured Products
Aprisa
Aprisa is a tape-out proven netlist-to-GDSII physical...
FailMap TM A Design and Test Collaboration Tool
Get Composite View of Design and ATE Failure Waveforms! Mask or Fix ATE Failures Automatically! BENEFITS For...
Semiconductor IP Solutions
As the semiconductor industry's trusted IP partner,...
CAP - Customizable Microcontroller Platform
Atmel's CAP is a microcontroller system-on-chip platform...
IE3D EM Design System
Full-wave EM simulations yield high accuracy designs...
verification IP
SoCVerify Kit is a library of HDL DH Verification IP with unified...
SerDes Solutions from eSilicon
Now available from eSilicon: Avago Technologies...
Xtensa Configurable Processors
Tensilica provides everything needed to quickly and...
Diamond Standard Processor Cores
Tensilica's Diamond Standard Series processor family...
DVT - For E and SystemVerilog Development
DVT is the most complete development environment for...
Chip Design Datesheet Directory
Blogs
-
JB’s Circuit
How do the readers of Chip Design - mostly engineers if one believes the polls - prefer to receive editorial content? Pr…
-
Domeika’s Dilemma
Multicore in the Age of the Unthinkable
Recently, I had the opportunity to read and finish in one weekend, ‘The Age of the Unthinkable’, by Joshua Cooper Ra…
-
Wizards of Electromagnetism
Greg Edlund and Larry Lerner Perspective
In Paul Rako’s recent Voices article my pals Larry Lerner (Agilent) and Greg Edlund (IBM) give their perspectives …
-
Editor's Note
The Process At TSMC That No One Talks About
What caused the high-level executive shuffle at the world's largest foundry.…
-
Koby's Kaos
Contemporary science is reductionist. The idea is that everything that happens can ultimately be explained as the intera…
