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CSR Bluetooth Smart Platforms at Heart of Advanced User Control Experience for Lenovo Smart TVs CSR plc (LSE: CSR; NASDAQ: CSRE) today announces that it has partnered with Lenovo
From the Blogosphere
ARM and Cadence have teamed up to show how system-level and implementation-level representations of a mixed-signal design can be linked together and kept in sync as the project progresses....
VCS AMS joint webinar with Synopsys, ST and ARM : latest insights on advanced mixed-signal verification
Happy Tuesday, I hope you all had a relaxing labor day weekend. To start fall successfully :), we are releasing a joint webinar on VCS AMS with STMicroelectronics and ARM as guest speakers on Wednesday, September 3rd, at 10am PST. You can register using the following link: https://event.on24.com/eventRegistration/prereg/register.jsp?eventid=835188&sessionid=1&key=49E9EAD925903BE7E00F6FC438EF651C...
The View from the Front Yard 3:30 AM, August 30, 2014 Texas A&M, hot on the heels of their newfound football success has upgraded Kyle Field, their legendary football stadium where undergrads aren’t allowed to sit. They’re allowed into the stadium mind you, it’s just considered poor form to sit....
HiI am new in WCF and i am working on a desktop application in which i want to get data from my database on webserver where my domain is hosted. To connect to my database i must whitelist my ip, i want to get data from anywhere with any IP ......
Sensor networks for consumer and industrial applications can benefit from low-power RF technologies combined with hardware encryption for safeguarding data.
These days, you’d need to be buried under a pile of verification reports not to know that hardware emulation has gone mainstream, moving away from a dusty back room to your cubemate’s
We all know that it’s only a matter of time until our cars are able to communicate with each other. Another wave of connectivity-focused innovation is underway and, this time around,
With anticipated economic limits to the continuation of Moore’s Law now on the horizon, it seems that moving into the 3rd dimension (3D) by stacking multiple layers of integrated
Introduction IEEE 1149.1-2013 is not your father's JTAG. The new release in June of 2013 represents a major leap forward in standardizing how FPGAs, SoCs and 3D-SICs can be debugged
Traditional black box methodologies give way to a novel grey-cell approach for intellectual property (IP) and FPGA clock domain crossing (CDC) analysis. As design complexity escalates,
An on-chip network offers a set of services that allow chip designers and architects to optimize the design to meet the real world requirements of today’s devices, including those
There are many challenges when designing ICs that contain tens to hundreds of millions of gates and it won't get any easier as next-generation designs cross the gigagate threshold.
Initiated by Apple’s launch of the iPhone, the subsequent explosive growth of the smartphone market has provided the MEMS industry with one of its biggest opportunities to supply
Should foundries establish and share best practices to manage sub-nanometer effects to improve yield and also manufacturability? Team effort Design for yield (DFY) has been referred
Organizations: GSA, MIPI Alliance The MXL-M-PHY-MIPI is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI® Alliance Specification for M-PHY®. The
IDesignSpec™ is an award winning Electronic Design Automation tool that allows an IP, SoC, or System Designer to create the register map specification once and automatically generate
Founded in 1992, Sutherland HDL has trained thousands of engineers throughout the world on Verilog, SystemVerilog, SVA and UVM. WORKSHOP HIGHLIGHTS Verilog and SystemVerilog
With nearly 25 years of field-proven success, VTRAN™ offers the most cost-effective, full-feature solution to creating EDA and ATE test programs from simulation and ATPG vectors.
IDesignSpec™is an award winning Electronic Design Automation tool that allows an IP, SoC, or System Designer to create the register map specification once and automatically generate
Meridian CDC is the fastest, highest capacity and most precise clock domain crossing (CDC) solution in the market. It performs comprehensive structural and functional analysis to ensure
Organizations: GSA The TCI DDR 4/3 PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individually,