Chip Design Resource Center

From the Blogosphere

  • Blog Post: Differential to single ended: What happens when you use only one differential amplifier output

    Many applications require the conversion of a differential signal to single ended. Some common examples are an RF DAC buffer or a coaxial cable driver. Most of the time you can accomplish this with a magnetic transformer, but sometimes a transformer won’t work. If that’s the case, can you use a fully differential amplifier...

  • IP Requirements for Verifying CHI-Based Designs

    Just as IP components offload design effort, verification IP (VIP) components offload verification effort. VIP components are used to monitor traffic and substitute for selected master and slave components to enable controlled stimulus generation and coverage collection within an SoC design. To be effective in verifying...

  • WiGig Has Arrived to Enable IoT Designs--and Cut the HDMI Cord!

    What is WiGig WiGig is the name given to a high-speed multi-gigabit wireless communications standard over unlicensed 60GHz radio frequency band established by the Wireless Gigabit Alliance in 2007. Since then it has become part of the WiFi Alliances and established as one of the IEEE 802.11ad protocol. As part of the WiFi...

  • Mentor Graphics at Semi-Therm 31 – ‘Dolly the Heatsink’ and much more

    Semi-Therm, the world’s largest dedicated electronics thermal conference, will take place between March 15-19 at the Doubletree Hotel in San Jose, California. Now in it’s 31st year, this IEEE sponsored conference maintains its high standards in peer reviewed papers covering a range of disciplines within the...

Featured Articles

  • Freescale and NXP agree to $40 Billion merger

    Chipmaker NXP Semiconductors NV announced Sunday night that it has agreed to buy Freescale Semiconductor Ltd for $11.8 billion and merge business operations. The combined enterprise values at just over $40 billion and will create a new leader in the auto and industrial semiconductor markets.

  • The IoT and RTOS Reinvention

    A heads up on some of the changes in a new modular operating system environment. Wind River is positioning VxWorks 7 as the reinvented “Internet of Things” RTOS. For targets,

  • Embedded Memories Destined for IoT Seek Security/Power Management Balance

    Low-power designs that also stand guard against passive, semi-invasive and invasive attacks are evolving to protect the IoT devices found in automotive, wearables, medical, industrial

  • Europe’s Take on the IoT

    With 30 billion connected devices expected within five years and spanning automotive, consumer, medical, industrial, smart energy, wearables and more, the Internet of Things (IoT) may

  • Securing the IoT from Silicon to System: An interview with ARM’s Marc Canel, VP of Security Technologies.

    The announcement of ARM® mbed™ OS and the company’s natural fit with the Internet of Things got me wondering about ARM’s approach to security. Adding to Trustzone, there was

  • Multicore Q&A with LDRA

    Not just for plants, cross-pollination applies to know-how, too, and there may be no better example than what’s taking place among the mil-aero, medical, industrial and other markets as they seek to take on the complexities of security and safety for multicore systems.

  • Security: The Ultimate Barrier to IoT Success

    Coming to a meeting of minds on security, independent portability and virtualization will pave the way for IoT success.

  • Electronic Integration Options for Implantable Medical Device Platforms

    The health benefits in our future might just rest on how hale, hardy (and cost-effective) developers, including start-ups, can make their implantable medical device proof-of-concepts—and that warrants a close look at ASSP chips for help with size, power and development time hurdles.

Featured Products

  • Industry Leading Tools Linking Simulation and ATPG to Test

    Source III provides the industry’s most comprehensive and cost-effective vector translation product (VTRAN®) which links simulation/ATPG vector data to ATE, a powerful vector analysis

  • IDesignSpec™

    IDesignSpec™ is an award winning Electronic Design Automation tool that allows an IP, SoC, or System Designer to create the register map specification once and automatically generate

  • Mixel’s MIPI M-PHY

    Organizations: GSA, MIPI Alliance The MXL-M-PHY-MIPI is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI® Alliance Specification for M-PHY®. The

  • Expert SystemVerilog and UVM Training Services

    Founded in 1992, Sutherland HDL has trained thousands of engineers throughout the world on Verilog, SystemVerilog, SVA and UVM. WORKSHOP HIGHLIGHTS Verilog and SystemVerilog

  • Meridian CDC

    Meridian CDC is the fastest, highest capacity and most precise clock domain crossing (CDC) solution in the market. It performs comprehensive structural and functional analysis to ensure

  • VTRAN Vector Translation Tool

    With nearly 25 years of field-proven success, VTRAN™ offers the most cost-effective, full-feature solution to creating EDA and ATE test programs from simulation and ATPG vectors.

  • IDesignSpec™

    IDesignSpec™is an award winning Electronic Design Automation tool that allows an IP, SoC, or System Designer to create the register map specification once and automatically generate

Chip Design Datasheet Directory

    EDA Tools

    Verification Functional

  • by AMIQ EDA

    Design and Verification Tools (DVT) is an integrated development environment (IDE) for the e language, SystemVerilog, Verilog, and VHDL. It helps design and verification eng

  • by AMIQ EDA

    Thorough audit of your test benches Verissimo SystemVerilog Testbench Linter is a static code analysis tool that allows engineers to perform a thorough audit of their test

  • Methods / EDA Tools

    Design-for-Test (DFT)

  • by Source III, Inc.

    Source III provides the industry’s most comprehensive and cost-effective vector translation product (VTRAN®) which links simulation/ATPG vector data to ATE, a powerful vecto

  • by Source III, Inc.

    With nearly 25 years of field-proven success, VTRAN™ offers the most cost-effective, full-feature solution to creating EDA and ATE test programs from simulation and ATPG ve

  • Verification

  • by Agnisys

    IDesignSpec™is an award winning Electronic Design Automation tool that allows an IP, SoC, or System Designer to create the register map specification once and automatically

  • by Agnisys

    IDesignSpec™ is an award winning Electronic Design Automation tool that allows an IP, SoC, or System Designer to create the register map specification once and automaticall

  • by Real Intent

    Meridian CDC is the fastest, highest capacity and most precise clock domain crossing (CDC) solution in the market. It performs comprehensive structural and functional analysi

  • by Sutherland HDL, Inc

    Founded in 1992, Sutherland HDL has trained thousands of engineers throughout the world on Verilog, SystemVerilog, SVA and UVM. WORKSHOP HIGHLIGHTS Verilog and System

  • Semiconductor Technologies

    IP - Core

  • by Calypto Design Systems

    Accelerate Time to Rtl, Reduce Verification Effort
    The Catapult® high-level synthesis tool empowers designers to use industry standard ANSI C++ and SystemC to describe functional intent, and move up to a more productive abstraction level.

  • by Calypto Design Systems

    With the explosion of consumer electronics, designing for low-power has become an important design constraint and a key differentiating factor. The RTL design phase provides the ideal opportunity to dramatically reduce power, since several micro-architectural transformations can be done at this stage, both via automated tools as well as manually by the RTL designers.

  • by Calypto Design Systems

    The emergence of consumer electronics is causing a fundamental shift in Register Transfer Level (RTL) design methodologies. The race for time to market has resulted in the adoption and growth of higher level design creation methodologies. In particular, High Level Synthesis (HLS) directly from software models to hardware has become very popular.

  • by Mixel, Inc.

    Organizations: GSA, MIPI Alliance The MXL-M-PHY-MIPI is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI® Alliance Specification for M-PHY

  • by SmartDV Technologies India Private Limited

    Organizations: EDAC, GSA, EIC, OCP-IP, Si2, SPIRIT SmartDV offers wide range of Verification IP’s, Memory models and Design IP’s. Verification models include complete

  • by True Circuits Inc.

    Organizations: GSA The TCI DDR 4/3 PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv

  • by True Circuits Inc.

    Organizations: GSA True Circuits’ complete family of standardized, silicon-proven, low-jitter PLL and DLL hard macros spans nearly all performance points and features typi