Chip Design Resource Center

Community

  • "CHIPS: ASIC pioneer reinvents 3-D FPGAs"

    ASICs were once the number one choice for ultra-low cost consumer electronic devices, because of their low per unit cost and very small size. Unfortunately, their set-up cost has skyrocketed to $50 million or more. Gate arrays have been the only alternative, but their cost per unit is expensive compared to ASICs per unit...

    NextGenLog
  • Isolation Cell Usage Tips Continued

    There were many questions on why output isolation is preferred over input isolation logic, sorry could not get time to respond to all the queries related to this. Here is my view point on this Output signal isolation method is usually a preferred choice than the input isolation method as former leads to fewer isolation...

    Magic Blue Smoke
  • Magic time — iPad Tutorial

    “Yeah, it’s true. When something exceeds your ability to understand how it works, it sort of becomes magical. And that’s exactly what the iPad is.” — Jony Ive, Apple Senior Vice President, Design You can see the iPad demo video at: http://www.apple.com/ipad/#video...

    EEBeat
  • Parsing serial text based commands

    One of the fun tasks I have at work is creating fun lab projects for teaching classes.  In this case, the class was on basic embedded programming and the object was to show how serial input command strings are parsed into their basic components.  My pseudo project was a coffee maker, and the command set [...]...

    Notes From The Lab

Featured Articles

Featured Products

  • Sourcery G++

    Supported TI Processors:OMAP35x, Stellaris MCUs , DM646x, DM644x, DM355 Sourcery G++™ professional C/C++ development tools from CodeSourcery offer high value

  • Mixel’s SerDes Technology

    Mixel is a leading provider of silicon-proven mixed-signal IP that covers a wide range of applications, technologies and processes. Mixel has a full portfolio of highly programmable

  • PLL and DLL Hard Macros

    True Circuits’ complete family of standardized, silicon-proven, low-jitter PLL and DLL hard macros spans nearly all performance points and features typically requested by ASIC, FPGA

  • Affordable and High Quality US-based ASIC/FPGA Design Services

    SiliconXpress is a fabless chip provider, with offices in Santa Clara, CA and Lubbock, TX. We offer one-stop design, fabrication, and test/packaging services for our Mil/Aero and commercial

  • Synopsys FPGA Implementation Platform

    Organizations: EDAC, SPIRIT The Synplicity Business Group of Synopsys leverages its many years of experience to deliver a high-quality, high-performance, easy to use and technology-independent

  • T-Spice - Analog Simulation Tools

    T-Spice is a complete design capture and simulation solution that provides accuracy and convergence with market-proven reliability. To transform your ideas into designs, you must be

  • Synopsys FPGA Implementation Platform

    Organizations: EDAC, SPIRIT The Synplicity Business Group of Synopsys leverages its many years of experience to deliver a high-quality, high-performance, easy to use and technology-independent

  • Confirma Rapid Prototyping Plus

    Organizations: EDAC, SPIRIT The success of today’s ASIC and SoC projects depends to a large degree on the verification methodologies used. Because of the increase in design

  • EVI - Calibre® Integration

    Seamless Integration of Sign-off Verification Tools External Verification Interface (EVI) provides an interface for users of Mentor Graphics’ Calibre® tool suite, to use L-Edit

  • HiPer Verify - Physical Verification Tools

    HiPer Verify™ is a comprehensive yet affordable solution for analog/mixed-signal IC design rule checking (DRC) and hierarchical netlist extraction on the Windows® and Linux®

Chip Design Datasheet Directory