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Cadence Design Systems, Inc.

Cadence InCyte Chip Estimator

The Cadence InCyte Chip Estimator accurately predicts die size, power, performance and cost. It is used to capture chip specifications and to perform what-if analysis, explore architectural options, and to optimize chip plans throughout the EDA flow. The InCyte Chip Estimator provides IC design teams, system architects and management with the ability to visualize design tradeoffs alongside existing EDA tools. Users of the InCyte Chip Estimator can explore a wide range of chip architecture options including IP, technology nodes and processes, power optimization strategies, and packaging. The system combines speed and accuracy to enable more informed decision-making around issues affecting chip performance, functionality and cost. The InCyte Chip Estimator uses IP and manufacturing data in its analyses, and estimation results typically correlate to within 90% of final silicon.

InCyte Chip Estimator users enter a high-level design specification, including gate counts, performance goals, off-chip bus connections, memory configurations and optional connectivity. They then select IP to be considered either by importing IP Lists they build by searching and selecting IP at ChipEstimate.com, choosing from the tool’s extensive integrated catalog or by entering in custom IP definitions. After the initial specification is defined, the InCyte Chip Estimator returns a complete datasheet with estimations of final silicon including die area, performance, power, leakage, yield, package recommendations, and production chip cost.


Whether you’re starting with a complete chip specification or just a high level block diagram, or exploring architectural options during the design implementation stage, the InCyte Chip Estimator can provide you with meaningful feedback in seconds.







FEATURES & BENEFITS

  • Accurate estimation of chip size, power, performance and cost.
  • Architectural what-if analysis in seconds.
  • No RTL required, begin with a high level specification or block diagram.
  • Integrated library of over 6,000 IP components.
  • Support for 100’s of manufacturing processes from leading semiconductor manufacturers.

SYSTEM REQUIREMENTS

  • Windows 2000/XP/Vista
  • Linux
  • Solaris

INDUSTRIES SERVED

Audio, Automotive, Biometric, Computer Services, Consumer Products, Defense, Industrial, Entertainment, Healthcare, Networking, Security, Telephony, Telecommunications, Wireless


Contact Information

Cadence Design Systems, Inc.
Cadence Design Systems, Inc.

2655 Seely Avenue
San Jose, CA, 95134
USA

tele: 408.943.1234
fax: 408.943.0513
www.cadence.com

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