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HDL Design House

verification IP

Organizations: OCP-IP


SoCVerify Kit is a library of HDL DH Verification IP with unified organization, implementation and supported verification methodologies. SoCVerify Kit is a single verification IP solution for SoC projects that allows verification managers to select necessary VIP from one vendor assuring that unified and advanced verification methodologies are used in all segments of SoC projects. HDL DH SoCVerify Kit provides verification engineers and managers with a broad portfolio of VIP allowing easy verification of today’s SoC. With large investments in development, verification, maintenance and support for this library, HDL DH provides its customers with complete verification IP solutions.SoCVerify Kit covers a large number of standards and protocols such as I2C, Hyper- Transport, Serial RapidIO, SATA, SAS, LPC, PCI, PCI-X, SPI4, SMBUS, PMBUS, SDHC/MMC, HDMI, ATA/ATAPI-8. VIP that constitute the SoCVerify Kit library support a wide set of verification methodologies such as: eRM, URM, and OVM. HDL DH provides the market a multi-language verification IP environment and a smooth transition to advanced verification methodologies.The purpose of SoCVerify Kit is to provide HDL DH customers with one unified VIP solution for SoC verification problems. The large number of supported protocols and standards by the VIP in SoCVerify Kit solves typical verification problems in today’s SoC, and HDL DH plans to include even more protocols and standards for its SoCVerify Kit VIP.


FEATURES & BENEFITS


  • The I2C uVC verifies the behavior of an I2C interfaced core and has two applications: 1) verification of a single device with an I2C interface, or 2) verification of a system with multiple I2C – compatible devices.
  • The SerialRapidIO uVC verifies the behavior of an SerialRapidIO interfaced core and has two applications: 1) verification of a single device with an SerialRapidIO interface, or 2) verification of a system with multiple SerialRapidIO – compatible devices.
  • The ATA/ATAPI-8 UVC includes the Packet Command feature known as the AT Attachment Packet Interface (ATAPI)
  • The Serial ATA uVC can be used to verify the IP core containing either a host or one or more devices
  • HyperTransport uVCs can be used to verify complex SoC designs such as HyperTransport trees and architectures with multiple HOSTs or multiple HyperTransport chains






TECHNICAL SPECS


  • I2C UVC

      • Supports I2C bus specification, version 2.1

      • I2C device types implemented: MASTER, SLAVE, MASTER/SLAVE

      • Supports different speed modes: Standard, Fast and High-speed

  • Serial RapidIO UVC

      • Supports RapidIO Spec. 1.3

      • Serial RapidIO device types: INITIATOR, TARGET, INITIATOR/TARGET

      • Supports both 1x/4x Serial Physical Layer architectures

  • ATA/ATAPI-8 UVC

      • ATA/ATAPI-8 revision 2-compliant

      • Implements both host and device (allows multiple device instances)

  • Serial ATA UVC

      • Compliant with both Serial ATA rev1.0a and Serial ATA II rev1.1

      • Supports legacy ATA commands

  • HyperTransport UVC

      • HyperTransport spec. 1.10

      • HyperTransport device types implemented: Host- Bridge, Tunnel, Cave, Bridge and Switch



INDUSTRIES SERVED


Networking, Telecommunications, Wireless



Contact Information

HDL Design House
HDL Design House

Kraljice Marije 1/7
Belgrade, 11000
Serbia

tele: +381.11.303.98.04
fax: +381.11.303.98.17
info@hdl-dh.com
http://www.hdl-dh.com

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