Mixel’s MIPI D-PHY Transceiver IP in use on California Micro Devices CM5160 Chip
Mixel’s D-PHY provides key interface on CMD Display Controller Chip
San Jose, CA December 2, 2008 – Mixel Inc., the leader in mobile mixed-signal IPs, announced today that the Mixel D-PHY Transceiver IP is used in California Micro Devices (CMD) CM5160 chip. The D-PHY is the physical layer of the Display Serial Interface (DSI), Camera Serial Interface (CSI), and UniPro™; all interface standards for mobile devices developed by the Mobile Industry Processor Interface (MIPI) Alliance. The CMD chip offers a unique architecture that allows handset manufacturers to interface to LCD display modules based on either the MIPI or MDDI (Mobile Display Digital Interface) standard.
“As a customer of multiple Mixel products we can attest to their timely delivery of high quality mixed-signal IPs”, said Kyle Baker, vice president of marketing for California Micro Devices. “We received excellent support from Mixel during the integration of the MlPl Transceiver IP. Mixel’s experience adds great value to our on-going relationship.”
Mixel’s part number MXL-TXRX-MIPI is the MIPI Transceiver while MXL-PHY-MIPI is a complete D-PHY IP including the Transceiver, SerDes and digital logic. Both IPs are available on TSMC and Chartered Semiconductor foundries at 130nmLP and Tower 180nm. The MIPI D-PHY IP will also be offered on other process nodes and foundries.
“We are currently the only Mixed-signal IP provider of silicon-proven MIPI PHYs,” said Ashraf Takla, President and CEO of Mixel, Inc. “Our MIPI specific PLLs complement our silicon-proven MIPI PHYs and provide important savings in power and cost to companies that need to support the new MIPI standards in their next generation products. Our Multiple design wins underscore the emergence of the MIPI market and Mixel success in maintaining our leadership position“
The MIPI D-PHY is a point-to-point differential interface supporting a clock and multiple data lanes. The callable data lanes support both bidirectional and unidirectional modes. The High-Speed mode operates at up to 1Gbps data transfer per lane; the Low Power mode offers reduced power consumption at lower speed. For more information on Mixel’s MIPI offerings visit www.mixel.com/mipi.
Mixel is the leading provider of mixed-signal mobile IPs and offers a full portfolio of high performance mixed-signal connectivity IP cores. Working with Mixel, first functioning silicon is the rule, no exceptions. Mixel cores are created using differentiated design technology that helps set our customers’ products apart. Mixel’s mixed-signal portfolio includes PHYs, SerDes (suitable for PCI Express, SATA, EPON, XAUI, Fiber Channel), Mobile Transceivers (MIPI and MDDI), general purpose transceiver (LVDS, DDR2, PCI-X, SSTL, HSTL, CE-ATA, CardBus, Parallel ATA), and high performance PLL, DLL, and ADC IP. More information is available by contacting Mixel at firstname.lastname@example.org or visiting Mixel’s web page at www.mixel.com.