Silicon On Insulator (SOI) Implementation

Increased demand for high performance, low power and smaller area among microelectronic devices is continuously pushing the fabrication process to go beyond ultra-deep sub-micron (UDSM) technologies, leading to an alternative, Silicon On Insulator (SOI) process. The paper introduces SOI technology, talks about the design challenges associated with ASIC implementation with SOI for today’s complex designs and finally lists out implementation guidelines to overcome these challenges.

Before you download the white paper, please sign our guest book

Please register or log in to view this white paper


If you've already created an account with us, please login here

Lost your password?


User Information

Contact Information

Infotech-Enterprises, Inc.

1190 Saratoga Ave, Ste. 110
San Jose, CA, 95129

tele: 408-213-0370
fax: 408-213-0370