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Arteris Joins TSMC Flow 12.0 With Flexnoc NoC Interconnect IP

SUNNYVALE, CA–(Marketwire – Jun 8, 2011) – Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, today announced that its Network-on-Chip (NoC) interconnect IP and tools will be available to TSMC customers as part of TSMC Reference Flow 12.0, the foundry’s latest design reference flow to enable its advanced 28nm (nanometer) process technology.

Arteris provides a commercial NoC interconnect semiconductor IP solution for systems-on-chip (SoCs), and its NoC interconnect products are incorporated today in commercially available systems such as smart phones, tablets, and digital televisions. Its technology, which is available as configurable IP including a suite of intuitive design tools compatible with existing EDA flows, is used by designers to manage on-chip communications of top-level SoC interconnects, sub-systems, IP blocks and other elements on a chip. Additional products such as the C2C™ Chip-to-Chip Link™ manage communication between separate dies composing a System in Package (SIP). The Arteris network on chip products significantly reduce the time and complexity of developing today’s highly integrated SoCs while improving power, performance and area thereby lowering SoC design costs and improving SoC gross margins.

“TSMC Reference Flow 12.0 includes innovative approaches to address challenges our customers face today, such as SoC wire routing congestion and system-level simulation integration. The network-on-chip interconnect technology offers a solution to solve the problem at the architectural level,” said Suk Lee, Director of Design Infrastructure at TSMC. “Having an on-chip interconnect fabric strategy is an increasingly important aspect of advanced SoC design as we deliver complete 28nm design infrastructure to our customers.”

“TSMC Reference Flow 12.0 takes design efficiency to a new level by integrating our highly configurable interconnect IP with TSMC’s physical design flow. Arteris’s NoC interconnect IP and integrated simulation tools provide a key enhancement to design methodologies through increased automation and architectural innovation,” said Charlie Janac, Arteris President and CEO. “We are pleased to be the provider of NoC interconnect technology for TSMC’s design flow and to be part of TSMC’s very forward-thinking Open Innovation Platform. We look forward to working with mutual customers to help implement leading-edge SoC solutions optimized for TSMC’s new manufacturing processes.”

About Arteris

Arteris, Inc. provides Network-on-Chip interconnect IP and tools to accelerate System-on-Chip semiconductor (SoC) assembly for a wide range of applications. Results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster development of ICs, SoCs and FPGAs.

Founded by networking experts, Arteris operates globally with headquarters in San Jose, California and an engineering center in Paris, France. Arteris is a private company backed by a group of international investors including ARM Holdings, Crescendo Ventures, DoCoMo Capital, Qualcomm Incorporated, Synopsys, TVM Capital, and Ventech. More information can be found at www.arteris.com.

Contact Information

ARTERIS, INC.

1741 Technology Drive
Suite 250
San Jose, CA, 95110
USA

tele: 408.313.7281
fax: 408.904.6156
sales@arteris.com
www.arteris.com

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