Tanner EDA and Aldec Deliver High-Performance A/MS Solution for Mixed-Signal IC Design and Verification

Seamless interface allows both analog and digital engineers to solve complex analog/mixed-signal verification problems

Design Automation Conference 2012

MONROVIA, Calif.–(BUSINESS WIRE)–Tanner EDA, the catalyst for innovation in the design, layout and verification of analog and mixed-signal integrated circuits (ICs), and Aldec, Inc., an industry leader in mixed VHDL, Verilog and SystemVerilog simulation, have collaborated to deliver an integrated co-simulation solution for analog and mixed-signal (A/MS) design. Tanner EDA’s new HiPer Simulation A/MS offers their T-Spice analog design capture and simulation tool together with Aldec’s Riviera-PRO™ mixed language digital simulator. The solution allows both analog and digital designers to seamlessly resolve A/MS verification problems from one cohesive, integrated platform.

Creating and verifying A/MS integrated circuits is a challenge. Spice-based simulation provides the accuracy needed for the analog design, but is too slow to handle the digital part. Event-driven digital simulation provides the necessary speed to simulate the digital portions, but fails when dealing with the analog parts. As A/MS designs grow in complexity and business pressures force design teams to shorten time to market and reduce re-spins, a new solution for mixed analog and digital co-simulation, with a robust feature set and an affordable price, is needed.

HiPer Simulation A/MS helps to eliminate co-simulation complexities by automatically recognizing the analog and digital portions of a design and enabling designers to easily verify interfaces between analog and digital blocks. The integrated solution provides accurate, high-performance co-simulation that allows designers to verify the most complex A/MS designs with ease and confidence, and within budget.

“Tanner EDA’s focus on the price-performance ratio extends to bringing innovations to our customers from well-regarded partners with a similar concern for total cost of ownership,” said Greg Lebsack, president of Tanner EDA. “HiPer Simulation A/MS — based on mature, industry proven products — provides customers with a highly productive and practical A/MS tool suite that bridges the cross-over points between analog and digital design.”

“The synergies we have with Tanner EDA span both technology and business,” said Dr. Stanley Hyduke, president and CEO for Aldec. “Both companies have delivered top-notch products and relentless customer service for the last 20 plus years and this collaborative A/MS solution will prove again why both Aldec and Tanner EDA continue to see growth and innovation in our respective areas of expertise.”


HiPer Simulation A/MS is available on both Windows and Linux. The new product includes Tanner EDA’s design entry and simulation tool suite for analog design (S-Edit for schematic capture, T-Spice for circuit simulation (with Verilog-A modeling), and W-Edit for waveform probing) and Riviera-PRO (TE) – the Tanner Edition of mixed VHDL and Verilog simulation from Aldec. For additional detail, click here to replay a joint Tanner EDA-Aldec webinar entitled “Bridging Analog and Digital Verification.”

Visit us at DAC 2012

Both companies will be demonstrating the integrated product in their respective booths at DAC 2012 – Tanner EDA in Booth #1126 and Aldec in Booth #2126. (Register online for a private technical demonstration at the Tanner EDA booth.)

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, Design Rule Checking, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions.

About Tanner EDA

Tanner EDA provides a complete line of software solutions that catalyze innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

HiPer Simulation A/MS is a trademark of Tanner Research, Inc.

All other trademarks and trade names are the property of their respective owners.

Contact Information

Aldec, Inc.

2260 Corporate Circle
Henderson, NV, 89074

tele: 702-990-4400
fax: 702-990-4414

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