November - 2015
- Introducing the Palladium Z1 Enterprise Emulation Platform
Daryn Lau, VP and GM of Hardware System Verification Group at Cadence, introduces the Palladium Z1 enterprise emulation platform. With more than five times the emulation throughput,
October - 2015
- Whiteboard Wednesdays – New Tensilica Vision P5 DSP
In this week's Whiteboard Wednesday video, Dennis Crespo highlights the performance and power features of the new Tensilica Vision P5 DSP architecture for mobile, automotive, and security applications.
September - 2015
- Meeting PPA and TAT Targets with Innovus Implementation System
January - 2015
- Saygus V2 Android Smartphone
Saygus VÂ² (V Squared), winner of the CES 2015 Innovation Award, has 320 GB of storage, ARM-based Qualcomm Snapdragon 801, 21 MP camera, dual-boot capable, 2.5GHz quad-core processor, runs Android 4.4.4 KitKat....and more.
- Interview with Pebble Watch founder
Getting the Pebble Watch to Market. A conversation with Eric Migicovsky, Pebble founder and CEO
- CES 2015: Expanding the Connected Experience
Power-efficient ARM technology is everywhere you are, expanding your connected life.
November - 2014
- ARM TechCon Videos: Interview with Ian Drew. (Part 2: 'mbedding' the IoT)
Embedded editor Chris A. Ciufo chats with Ian Drew, CMO, ARM. In part 2, the guys discuss: ARM's mbed/mbed OS and Cortex-M7; the easy path to the IoT is made easy by ARM's new mbed
- ARM TechCon Videos: Interview with Ian Drew. (Part 1: Servers)
Embedded editor Chris Ciufo chats with Ian Drew, CMO, ARM. ARM's move into 64-bit servers with HP's recent âMoonshotâ announcement; how the IoT grows from the enterprise and handsets; and ARM partners' complete infrastructure for servers.
- How HAPS FPGA-Based Prototyping Speeds USB 3.1 IP Product Development
See how Synopsys HAPS-70 FPGA-based prototyping platforms helped to accelerate Synopsys' development of 10G USB 3.1 IP. HAPS offers a flexible, off-the-shelf platform that enabled the R&D team to quickly develop and test RTL models, perform hardware validation, and ensure hardware/software interoperability.
- Synopsys & USB-IF on USB 3.1 & USB Type-C Connectors at IDF 2014
Join USB-IFâs Jeff Ravencraft and Synopsysâ Eric Huang in a discussion about new USB 3.1 features, including 10 Gbps data rates and USB Type-C Connectors, at IDF 2014.
- Industry's First Platform-to-Platform 10G USB 3.1 Host-to-Device Data Transfers
See the industry's first platform-to-platform 10G USB 3.1 technology demonstration. In this video, Eric Huang runs two HAPS-70 FPGA-based prototyping platforms with 10G USB 3.1 device and host IP. The platforms are connected with a standard USB 3.0 cable running at 10G USB 3.1 speeds of up to 915 MBps.
October - 2014
- Enterprise IP Management eSeminar
Streamed live on Oct 24, 2014 Learn about the changing dynamics of hardware and software intellectual property (IP) management. Panelists include: Warren Savage, CEO, IPextreme
July - 2014
- Why Don't Software Programmers like Comments?
Cristian Amitroaie, CEO of Amiq, talks with John Blyler about Specador, a automated HTML documentation tool for chip design and verification engineers. This tool generates meaningful documentation even from poorly documented source code, as it actually compiles the code and can generate cross-link class inheritance trees, design hierarchies, and diagrams. The need for this functionality lead to an interesting discussion about the software programming process and why programmers rarely document their own work.
June - 2014
- Why IP Providers Need the New 1149.1/JTAG
Intellitech's CEO CJ Clark explains why the latest JTAG update brings much needed capabilities to IP providers and IC developers alike.
April - 2014
- Imec’s mm Wave Motion Sensing Technology
Motion sensing applications with mm wave technology at Imec is the topic of this interview between Liesbet Van der Perre, Imec Program Director of Wireless Communication, and John Blyler, VP and CCO at Extension Media.
December - 2013
- Mentor’s Wally Rhines – Learning Curve; Golden 28nm, IoT Innovation and Systems Engineering
Wally Rhines, Chairman and CEO of Mentor Graphics, talks about Moore's Law in light of the Learning Curve; 28nm as the golden node; critical need for IoT innovations; and why systems engineering often fails.
June - 2013
- Collaboration is the key to chip innovation
In our third interview at the Design Automation Conference in Austin, Texas, John Blyler of Chip Design Magazine talks with Dennis Bibeau of Infotech about the importance of collaboration across all disciplines in achieving innovative chip design.
- Code integration facilitates chip innovation
Chip Design's John Blyler interviews Cristian Amitroaie, CEO of AMIQ (http://www.amiq.ro) on the importance of code integration and the Eclipse platform At the Design Automation Conference in Austin, Texas.
- Innovating with Statistical Analysis
In our first interview at the Design Automation Conference in Austin, Texas, John Blyler talks with Zhihong Lu of Proplus (http://www.proplussolutions.com/en/contact/) about the problems and potential of innovation in chip design through statistical analysis.
- RTL Signoff turns competitive
In our fourth interview this week at the Design Automation Conference in Austin, Texas, EiC John Blyler of Chip Design talks with Mike Gianfagna, Vice President of Corporate Marketing at Atrenta, about the growing competition and advances in RTL Signoff.
November - 2012
- GigOptix-40G DQPSK Demonstration
GigOptix demonstrates 40G DQPSK with revolutionary TFPS polymer modulator
September - 2012
- Cost-Effective Millimeter Signal Analysis Approaches | Agilent Technologies
This video was provided by IEEE.tv's coverage of IMS 2012 in Montreal. Material was created by Ben Zarlingo and presented by Bruce Erickson of Agilent Technologies. http://www.agilent.com/find/sa
- SDC Management and Verification: What's Missing?
Sarath Kirihennedige, Sr. Manager Product Engineering at Real Intent, speaks with Graham Bell about how design constraints (SDC) are currently developed, what are the problems with the current approach and what a complete Constraints management and verification solutions looks like.
- John Blyler Interview on ChipEstimate.TV
Sean O'Kane, Producer/Host ChipEstimate.TV interviews: John Blyler, Editor-in-Chief, Chip Design
- Synopsys Discusses its New DDR4 Memory Interface IP
Sean O'Kane from ChipEstimate.com interviews Navraj Nandra about the Synopsys' DesignWare DDR4 IP product release. They discuss DDR4 SDRAM, its market, and their predictions for DRAM.
Navraj Nandra, Synopsys and Sean O'Kane, ChipEstimate.com
August - 2012
- IMS 2012 Keynote on Integrating Design and Test
Dr. Mark Pierpoint delivers the IMS2012 MicroApps Keynote address: As global competition increases, the need to produce the next state-of-the-art product faster has driven changes in how EDA and test instrumentation work together. Gone are the days when a design could be thrown over the wall to production. The next generation of communications protocols have barely been labeled "standards" when products using them have hit the streets. To produce better communications products faster requires that the line between EDA and test be blurred and new synergies between them created...
- Paul Estrada discusses the benefits of integrated analog FastSPICE with Tanner EDA tool suite
Paul Estrada - CTO of Berkeley Design Automation - shares his perspectives on the benefits to users by integrating BDA Analog FastSPICE within the analog mixed-signal design tools offered by Tanner EDA.
- Semicon West 2012 - Ludo Deferm interview
John Blyler, Editor-in-Chief, Chip Design and Embedded Intel magazines, Sean O'Kane, Producer/Host ChipEstimate.TV interviews: Ludo Deferm
- Semicon West - Karen Lightman interview
John Blyler, Editor-in-Chief, Chip Design and Embedded Intel magazines interviews: Karen Lightman, Managing Director, MEMS Industry Group
- Semicon West - Jim Feldhan interview
John Blyler, Editor-in-Chief, Chip Design and Embedded Intel magazines interviews: Jim Feldhan, President, Semico Research.