Sutherland HDL, Inc

Expert SystemVerilog and UVM Training Services

Founded in 1992, Sutherland HDL has trained thousands of engineers throughout the world on Verilog, SystemVerilog, SVA and UVM.


  • Verilog and SystemVerilog for Design and Synthesis: Comprehensive training on the synthesizable portions of Verilog and SystemVerilog, with emphasis on proper coding styles for optimal simulation and synthesis results.
  • SystemVerilog Object Oriented Verification: Detailed training on the SystemVerilog constructs used by advanced verification methodologies, including OOP, constrained random stimulus, and coverage.
  • Mastering SystemVerilog UVM: Enables engineers to write reusable testbenches using UVM, including transactions, constrained random tests, coverage and scoreboarding.
  • SystemVerilog Assertions for Design and Verification Engineers: Advanced training enabling engineers to verify complex logic using assertions. SVA operators and properties are covered in detail.


  • On-site Workshops: Held at your facility, at a time and location that is best for your engineering team. Course topics can be customized to meet the needs of the team. All that is required is a conference room. Sutherland HDL can provide a portable lab environment.
  • eTutored™ live Online Workshops: Instructor-led, webinar-style workshops that provide all the benefits of on-site training, but with greater flexibility to mix training and work responsibilities. The same materials, lecture and labs are used as with on-site workshops. eTutored™ live workshops can be held just for your company. Sutherland HDL also holds periodic open-enrollment eTutored™ live workshops.
  • eTutored™ self-paced Online Workshops: Study anytime and anywhere for the utmost in schedule flexibility, while still benefiting from instructor-assisted tutoring and lab reviews by SystemVerilog experts. eTutored™ self-paced online workshops use eBooks and custom eLearning courses developed specifically for effective online learning.



  • Sutherland HDL’s acclaimed SystemVerilog training materials are now available for licensed use in internal corporate training! Benefit from up-to-date, best-in-class training courses without the time and expense of developing and maintaining internal materials. Train-the-trainer service is also available.
  • Sutherland HDL’s eTutored™ self-paced “Verilog and SystemVerilog Language Foundations for Design and Verification” workshop is being demonstrated at the Avery Design Systems’ Booth (1225). Stop by to try out this fantastic way to become a SystemVerilog wizard!


Automotive, Consumer Products, Defense, Industrial, Healthcare, Networking, Security, Telecommunications

Contact Information

Sutherland HDL, Inc

22805 SW 92nd Place
Tualatin , Oregon, 97062-7225

tele: 503-692-0898

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