Synopsys Redefines the IP Supplier Paradigm with New IP Accelerated Initiative
New DesignWare IP Development Kits and Customized Subsystems Accelerate Prototyping, Software Development and Integration of IP into SoCs
The IP Accelerated initiative augments Synopsys’ leading IP portfolio with new IP prototyping kits, software development kits and customized IP subsystems
The DesignWare IP Prototyping Kits include a proven reference design for the IP preloaded onto a HAPS-DX prototyping system and a software development platform running Linux OS with reference drivers
The DesignWare IP Virtual Development Kits are SDKs that include a processor subsystem reference design, a configurable model of the DesignWare IP as well as a Linux software stack and reference drivers
For hardware engineers, the IP Prototyping Kits provide a validated IP configuration that can be easily modified to explore design tradeoffs for the target application
For software developers, both the IP Virtual Development Kits and IP Prototyping Kits can be used as proven targets for early software development, bring-up, debug and test
To reduce risk and accelerate time to market, Synopsys experts can assist designers in creating and customizing IP subsystems for their specific application requirements as well as integrating the subsystems into their SoC
Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the IP Accelerated initiative to help designers significantly reduce the time and effort of integrating IP into their system-on-chips (SoCs). This initiative augments Synopsys’ established broad portfolio of silicon-proven DesignWare® IP with the addition of new IP Prototyping Kits, IP Virtual Development Kits and customized IP subsystems to accelerate prototyping, software development and integration of IP into SoCs. With the IP Accelerated initiative, Synopsys goes beyond the traditional IP supplier paradigm, redefining what customers can expect from their IP providers to help them successfully integrate IP with less effort, lower risk and faster time-to-market.
To view the multimedia news release, please go to: http://www.synopsys.com/Company/PressRoom/Pages/ip-accelerated-initiative-news-release.aspx
With the increasing SoC hardware and software complexity, developers need more from their IP providers to help meet their project schedules. Traditional IP blocks alone are no longer adequate to address the growing SoC design and integration challenges. Designers require solutions that ease IP configuration and integration into the overall SoC as well as accelerate their software development effort. The Synopsys IP Accelerated initiative delivers solutions that address designers’ pain points during IP implementation, software development and IP integration.
“Due to increasing design complexity, escalating design costs and shorter time-to-market, usage of third-party IP is expected to more than double from 2012 to 2018,” said Richard Wawrzyniak, senior market analyst, ASIC and SoC at Semico Research Corporation. “More companies are turning to third-party IP providers, such as Synopsys, to provide comprehensive solutions such as those offered by the IP Accelerated initiative to lower their development cost, reduce integration risk and meet their market schedules.”
DesignWare IP Prototyping Kits
The DesignWare IP Prototyping Kits center around proven reference designs that enable designers to start implementing the IP in an SoC context in minutes. The IP Prototyping Kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort, including Synopsys’ HAPS®-DX FPGA-based prototyping system with pre-configured IP and SoC integration logic, a PHY daughter board, simulation testbench and a DesignWare ARC® processor-based 32-bit software development platform running Linux, reference drivers and application examples. Designers can modify the standard IP configuration for their target application through a fast iteration flow consisting of Synopsys’ coreConsultant IP configuration tool, Synopsys’ ProtoCompiler synthesis and debug tool, and compilation scripts.
“With 50 percent of our budget going to software development, it’s necessary for us to have deeper system expertise to better support our customers,” said John Cummins, senior vice president, worldwide sales and marketing at DisplayLink. “We need to focus not only on acquiring the individual IP blocks, but also how the IP is integrated and validated in the context of the entire SoC. Synopsys’ IP Accelerated initiative hits the mark by addressing the key needs that directly impact companies’ ability to develop software for the IP and integrate it into an SoC.”
DesignWare IP Virtual Development Kits
The DesignWare IP Virtual Development Kits are SDKs consisting of a reference virtual prototype, which includes a model of a multi-core ARM® Cortex®-A57 Versatile™ Express board and a configurable model of the DesignWare IP. The IP Virtual Development Kits run Linaro® Linux® and include reference drivers for the DesignWare IP as well as provide non-intrusive debug control and visibility.
Software developers can use either the IP Virtual Development Kits or IP Prototyping Kits as a proven target for early software development, bring-up, debug and test concurrently with SoC development. Out-of-the-box support for a Linux software stack ensures that software developers are up and running instantly and can focus on the IP-specific software (e.g., drivers, bootcode, firmware).
Both the IP Virtual Development Kits and IP Prototyping Kits easily plug into existing software tool chains and interface seamlessly with the most popular embedded software debuggers, providing system-wide debug and analysis capabilities. The kits can be easily extended to represent the full SoC, enabling early and fast development of the entire board support package (BSP).
“Due to the growing size and complexity of software, semiconductor companies are looking for new solutions to reduce the escalating cost and effort of embedded software development,” said Chris Rommel, executive vice president of M2M and Embedded Technology at VDC Research. “With semiconductor companies now dedicating more than 50 percent of their development effort to software, Synopsys’ DesignWare IP Virtual Development Kits will enable companies to stay competitive in an increasingly software-driven market.”
Customized IP Subsystems
With extensive knowledge in IP subsystem integration, Synopsys experts can assist designers in customizing the DesignWare IP for their specific application requirements and integrating the IP into their SoC. Companies can leverage Synopsys’ IP expertise to obtain pre-validated, fully integrated subsystems, reducing the overall effort and cost to assemble and integrate the IP. Designers can then focus on differentiating their SoC rather than developing or integrating standards-based IP.
“Companies continue to face tremendous time-to-market pressures to stay competitive, and it is evident that the traditional approach to providing IP is no longer sufficient to meet their needs,” said Joachim Kunkel, senior vice president and general manager of the Solutions Group at Synopsys. “Customers are expecting more from their IP providers to address the exploding software content and increasing complexity of their chips. Synopsys’ IP Accelerated initiative, with new IP Prototyping Kits, IP Virtual Development Kits and customized subsystems, helps designers achieve faster IP prototyping, easier IP integration, and earlier software development.”
Availability & Resources
The DesignWare IP Prototyping Kits and IP Virtual Development Kits for select DesignWare IP are scheduled to be available in July.
See demos of the DesignWare Development Kits in Synopsys’ booth #1133 at the Design Automation Conference (DAC) on Monday, June 2 at 1:00 PM, Tuesday, June 3 at 3:00 PM, or Wednesday, June 4 at 1:00 PM.
See the DesignWare IP Development Kits in action:
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and next-generation verification IP for widely used protocols, analog IP, embedded memories, logic libraries, processor solutions and subsystems. To support software development and hardware/software integration of the IP, Synopsys offers drivers, transaction-level models, and prototypes for many of its IP products. Synopsys’ HAPS® FPGA-Based Prototyping Solution enables validation of the IP and the SoC in the system context. Synopsys’ Virtualizer™ virtual prototyping tool set allows developers to start the development of software for the IP or the entire SoC significantly earlier compared to traditional methods. With a robust IP development methodology, extensive investment in quality, IP prototyping, software development and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit http://www.synopsys.com/designware.
Synopsys, Inc. (Nasdaq:SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at http://www.synopsys.com.
Synopsys, Inc.700 E. Middlefield Road
Mountain View, CA, 94043