Dolphin Integration Selects Silvaco Variation Manager For SRAM Design at Advanced Nodes
Silvaco announced that Dolphin Integration, a leading provider of power- and density-optimized memory silicon IP, has selected Silvaco Variation Manager to perform critical variability analysis and reliability qualification on SRAM memories designed using advanced process technologies.
Variations in process across a silicon wafer or device must be carefully accounted for in the design of memories to produce robust products with high yield. These devices have elements that are uniformly replicated millions of times, so each cell must be designed with process variation tolerances to prevent failure – yet not be overdesigned, needlessly increasing area and power. Traditional Monte Carlo analysis is too slow to explore the range of possible global and local device variations and environmental parameters such as supply voltages and temperature. Variation Manager is a breakthrough technology delivering up to 30X simulation performance while guaranteeing the same level of accuracy. Its highsigma analysis capability provides very fast and highly accurate yield estimation, and the ability to quickly identify sample fails and design weaknesses during the bit-cell or memory design stage.
Over several years successfully using Variation Manager with previous process technologies, Dolphin Integration built Variation Manager into their design flow. “We selected Variation Manager to rapidly analyze the impact of potential process variations on our designs,” said Romain Verrier, Growth Unit Development Manager at Dolphin Integration. “Coupling Variation Manager with our mixed-signal simulator SMASH results in high speed yield verification for our memory architectures and improves the overall efficiency of the electrical validation and characterization flow of our libraries and standard cells.”
“As one of the most advanced providers of memory IP, Dolphin Integration’s selection of Variation Manager for their new generation of designs is a testament to its effectiveness,” said Firas Mohamed, General Manager of Silvaco France. “Memories are systems in which the entirety must be analyzed. This requires variation analysis across a range of memory elements from three sigma to very high sigma. Variation Manager’s technology uniquely delivers the needed performance and accuracy for these designs.”
Different elements in a memory design must be analyzed with suitable variation analysis techniques. Variation Manager addresses three key parts of a memory system:
- Bitcell – Analysis is often applied out to 7 sigma and beyond.
- Sense Amp – Analog in nature, fast Monte Carlo or high sigma is used for these portions.
- SRAM block – Larger portion of SRAM beyond the bitcell is analyzed. Extremely high capacity high sigma is required. In addition, Variation Manager remains robust even against highly non-linear phenomena.
Variation Manager is easily integrated into customer’s design flows and provides an intuitive, easy-to-use interface. It supports common 3rd party and proprietary transistor-level simulators, and process design kits and SPICE Netlists can be loaded without modifications.