Methodics and Magillem Team Up on IP Assembly Platform
Methodics Inc. announced a partnership with Magillem to deliver a new design environment linking best in class solutions to improve time to market and reduce cost of development for today’s increasingly more complex semiconductors.
As heightened competition drives semiconductor companies to innovate more quickly and deliver new products faster than ever to meet customer demands, companies must find ways to optimize how they develop and deliver products. Leading SoC companies are looking to capitalize on and allow for reuse of their extensive IP collections to quickly deliver new and derivative designs from products that have already been successfully produced.
“Magillem is the recognized leader for FrontEnd Design software and tools to realize the design of complex systems and the consolidation of data by assembling existing IP.” said Michael Munsey, Vice President of Business Development and Strategic Accounts at Methodics. “The ability to quickly and accurately assemble IP is critical to the success of platform based design. Magillem’s solutions allow the linking of design activities around a central IPXACT database and integrations into EDA tool flows to provide a correct by construction SoC assembly environment.”
“Methodics delivers modern Design Data and IP Lifecycle Management solutions for analog, digital, and SoC design teams.” said Stéphane Guntz, VP of Engineering at Magillem. “The joint solution offered by Methodics and Magillem guarantees completeness and accuracy of IP and systems information made available to the users. Early in the decision process, thanks to Methodics, system engineers will leverage the overall benefits of high level standardized description, as provided by IP Xact to maintain libraries of core platforms upon which to derive all new and derivative designs.”
Methodics and Magillem provide a fully synchronized environment, enabling a simple bidirectional update along the IP and system life cycle.. The environment ensures that the latest IP is always available and consistent and correct with the rest of the base platform. SoC designs can then be quickly assembled and kept up to date with changes to the underlying IP, allowing for a seamless and errorfree integration environment.