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Design Advantages of Programmable, Efficient SoC Architectures

Flexible interfacing, hardware reconfigurability, and improved power efficiency are among the benefits programmable SoCs offer.

System-on-Chip (SoC) architectures are an innovative technology designed to miniaturize devices for integrated systems, where an entire system resides on a single chip. This can halve board size and enable systems to have plug and play interfaces, further simplifying design. For example, external sensing devices can directly connect to the chip. The chip is capable of driving the pre-processing, converting and post-processing of signals. In addition to lowering system cost, an SoC can improve power efficiency and overall system speed by reducing wire delays caused by PCB tracks and parasitic capacitances.

SoC devices started becoming popular when miniature devices like smartphones came onto the market. With each new generation, SoCs have gotten thinner and smaller, while integrating more advanced technologies like gesture recognition, fingerprint sensors, touchscreen capabilities and health monitoring sensors directly into the device. As the number of interfaces increased, so did the need for the miniaturization of devices at the board level. This triggered the need of advanced SoCs to also replace active and passive components.

System-on-Chip Architecture

While SoCs may look simple on paper, they have complex architectures. A system-on-chip follows the basic principle of incorporating all the drivers, signal conditioning circuits and digital communication blocks inside the chip, so developers can implement most of the electronics of a product using a single chip. As shown in Figure 1, a basic SoC should have an integrated ADC, PWM, CAN, UART, JTAG, TWI, Ethernet, Timer/Counter and the core CPU, which controls all the operations.

Figure 1: General SoC Architecture (Source: Wikipedia)

Figure 1: General SoC Architecture (Source: Wikipedia)

Consider interfacing an LM35 temperature sensor with an 8051 microcontroller. The VOUT of the temperature sensor cannot be directly connected to the microcontroller. Instead, the signal must be amplified using an op amp, and a suitable analog-to-digital converter (ADC) is needed to convert the analog signal into a digital one. This creates quite a complex system for just a temperature sensor application. With an SoC, it is possible to directly interface the temperature sensor (or any other sensor) to the SoC without requiring external circuits apart from some few biasing resistors as external circuits.

Some SoCs are able to interface to high current requirement components such as motors or servo/stepper motors. Rather than require an external driver circuitry to enable the motor to interface to the SoC, this driver circuitry can be integrated into the SoC, greatly simplifying design.

Figure 1: General SoC Architecture (Source: Wikipedia)

Figure 1: General SoC Architecture (Source: Wikipedia)

Internally, the integrated complexity of SoC architectures introduces challenges because of power consumption, speed optimization and noise isolation. The analog section needs to be isolated from the digital section to reduce cross talk. Special care needs to be taken while routing from high-speed lines to maintain signal integrity. A proper clocking scheme, like that of the H clocking scheme shown in Figure 2, should be used to prevent improper clock timing in different SoC areas.

As the available surface area continues to shrink, power consumption becomes a major concern. The power being carried by the nm tracks in the SoC must be properly optimized to consume less power. Thus, designing the system for power monitoring and optimization becomes important, preventing power issues from making the system unusable.

Many SoCs are available today, from FPGA-based SoCs (e.g. switching-based designs) to RTOS SoCs and ASIC SoCs, as well as programmable SoCs. This last type of SoC offers advantages such as flexible interfacing, power performance and reconfigurability of hardware.

Programmable SoCs

Programmable SoCs, such as the PSoC family from Cypress Semiconductor, provide efficiency through software as well as hardware programmability. A development environment, such as PSoC Creator, manages programmability for both software and hardware.

Figure 3 shows the architecture of a programmable SoC. Integrated peripherals include a huge variety of ADCs, timers, counters, PWM, CAN, I2C, SPI, WCO, DMA, capacitive sensing, DAC, and programmable analog, among others. DACs are especially difficult to integrate, as they pose many noise and signal power optimization challenges. However, DACs can be highly efficient with a very good SNR and bandwidth when operating at a few Mbps data rate, which is more than enough for sensor and automation applications. To fill out the signal conversion components, a programmable SoC can include Delta Sigma ADC, as well as SAR ADCs.

Programmability gives developers the flexibility to trade off performance against power consumption. For example, configurable resolution, data rate and operating modes like continuous or single shot. An integrated capacitive sensing block makes the world of touch sensing available. Capacitive touch sensors, such as sliders and wheels, can be connected directly to the SoC without any external circuitry, enabling a small footprint for wearable and smartphone applications. Even a complex system like digital audio players and automotive controllers can be built around a programmable SoC.

Figure 3: Programmable System-on-Chip Architecture (Cypress PSoC) [ Source: http://www.cypress.com/file/126171/download ]

Figure 3: Programmable System-on-Chip Architecture (Cypress PSoC) (Source: Cypress Semiconductor)

The programmable hardware of a PSoC uses universal digital blocks (UDBs), allowing developers to create various digital designs using hardware like D flip-flops and combinational components. This allows reconfigurable functionality to be implemented in hardware without writing a code. Blocks can be designed using an intuitive state machine or Verilog codes.

Today, software design environments for SoCs need to correlate program code with hardware components. With a drag and drop GUI, developers can quickly “connect” software with hardware, then the tool generates the APIs and internal connection binaries for easily interfacing a component.

Figure 4: PSoC Creator Component Declaration User Interface

Figure 4: PSoC Creator Component Declaration User Interface

Consider interfacing a temperature sensor with a programmable SoC chip compared to the 8051 example above. The lines of code required to implement the same algorithm drops by half with the internally configurable components of a programmable SoC. As shown in Figure 4, many components like ADC, DAC, Temperature sensor blocks, I2C, etc. are available in a drag and drop GUI. The developer configures the block and writes code using this block to connect to general purpose I/O (GPIO) to perform a specific application. In addition, the developer does not need to code the clock synchronization of the ADC. Instead, dropping in the component causes the tool to generate the appropriate APIs, which can then be coded to start and initiate the component.

A program can be completed in just a few lines of code. Note that developers have the flexibility to go further into the code if they desire and use advanced APIs for more complex operations like interrupt control or multiplexing.

Analog Programmability

In addition, some programmable SoCs offer analog hardware programmability. The basic analog component is the op amp. Op amps are configurable for power, input/output routing and gain-bandwidth. They can be used as instrumentation amplifiers or as a buffer using the components. Because SoCs are designed with power as a primary constraint, low current capabilities combined with sleep and deep sleep features enable the SoC to use the least current when the CPU is not being used.

As described earlier, analog capacitive touch sensors or any other capacitive sensors can be directly interfaced to capacitive sensing capable I/O of some SoCs. For example, with PSoC, developers can select a capacitive sensing component in the development environment to easily add touch sensing to their applications.

Another important component of a programmable SoC architecture is GPIO. GPIO connects the system to the external world. A Cypress PSoC provides various categories of I/Os to interface with, including strong drive, pull up and pull down, and high impedance to address various current requirements and circuitry of the external world. In addition, a hot swap feature in the GPIO enables users to prevent input from being clamped to the I/O power supply level when the input voltage is above the I/O supply voltage.

Integrated PWMs and timer counter blocks in a programmable SoC architecture enable developers to more easily write complex timer operations through the configuration of TCPWM blocks as shown in Figure 4. By doing some simple calculations to understand the clock frequency and the compare signal, developers can adjust the duty cycle of a PWM without writing any code, making it simple to configure PWM to the requirements of a specific application.

Finally, many other communication blocks are available. For example, PSoC includes I2C, USB, CAN, SPI, and TWD with JTAG (for debugging). This makes programmable SoCs capable of addressing the latest trending products in the market at a low cost.

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Nishant-MittalNishant Mittal is a Systems Engineer at Cypress Semiconductor, Bangalore. He received his Master of Technology degree with a specialization in Electronic Systems from IIT Bombay in Mumbai, India.

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