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MIPS Technologies: Q&A with Majid Bemanian and Mark Throndson

The venerable MIPS architecture excels at real-time response, enabling AI for functional safety compliance, automotive ADAS, robotics, and much more.

Editor’s Note: Embedded Systems Engineering (ESE) sat down with two engineers: Majid Bemanian, Director of Marketing, and Mark Throndson, Director of Processor Marketing, from MIPS Technologies. MIPS was one of the first RISC architectures. MIPS was acquired by Imagination Technologies in late 2017. Imagination Technologies spun MIPS Technologies off as an independent company. With MIPS’ recent boost in VC funding, it is returning to the embedded space with an eye on Artificial Intelligence (AI). ESE discussed recent developments, a potential threat from open source RISC-V, and the hardware hacking threat known as Spectre.

Lynnette Reese, Embedded Systems Engineering (LR)I read a fairly recent press release from MIPS Technologies. The release made note of the MIPS architecture’s multithreading capabilities and other features related to Artificial Intelligence (AI). Multithreaded MIPS CPUs excel at real-time response.

Majid Bemanian, MIPS Technologies (MB): Yes, one example of a capability that the autonomous driving/ADAS/ AI sector finds of interest is management of their accelerators. The response time that you have to get for some of these applications is shrinking. So, they need some efficiencies in response time, and multithreading offers that. With multithreading you can create a more real-time environment, and you can also bring more efficiency to the process. Every microsecond counts. And the multithreading capability we offer can respond to interrupts, for example, at a much faster rate than traditional CPUs that are not multithreaded. As an example, the MIPS I6500-F is a highly scalable 64-bit MIPS multiprocessing solution that has been stringently assessed and validated to meet functional safety compliance for ISO 26262 and IEC 61508 standards.

Image: MIPS Technologies

LR: AI would be just one area.

MB: Right, for instance, MediaTek uses MIPS in its LTE modem. A good portion of the phone MediaTek ships is using MIPS today to handle the LTE traffic. MediaTek has been running into the fact that data rates keep going up from LTE to 5G, but at the same time they can’t really afford to vary consumption at the higher data rates. They need more efficient processing management. At the same time, they need more real-time response. We have been able to help MediaTek with its architecture. With multithreading they can have the traffic at much higher efficiencies and the quality of service and class of service. And for MediaTek, again it’s a question of real-time response, getting more efficiency out of your data path.

Mark Throndson, MIPS Technologies (MT): Smartphone modem technology is growing, delivering more and more bandwidth to and from the phone and thus creating more parallelism in that the wireless data paths are being used to transmit and receive the data. That in turn has led to the creation of more carriers and bundling of those carriers together to create a wider pipe. So, there’s a narrowing of the time slippage on each carrier that data is being sent over, helping deliver Quality-of-Service type features in addition to pure data bandwidth. As Majid said, there’s a real-time responsiveness requirement that is being driven by this. And in addition to the real-time responsiveness aspect, there is a performance aspect. The hardware multithreading technology in our cores addresses both aspects.

We can handle more performance with multithreading out of a similar size CPU. The cost for adding a second thread, for instance, is roughly 10 percent. But we can deliver anywhere from 30 to 50 percent in performance gains. In part, multithreading is a replication of an execution state within the CPU, a whole register set, and instruction queues at various points in the pipeline. So, you can switch between threads on a cycle-by-cycle basis. When an event comes up that needs a very fast response the MIPS CPU can immediately switch over to a second, third, or fourth thread—without any overhead. This brings both of those key values—fast response with low overhead—to a particular application that requires that.

This capability has applications in smartphone communications. You’ve probably heard about 5G for some time, but it’s taking a while to get to the point where it’s actually rolled out in production services. The industry has to grow into these new technologies. But when it comes down to the device level plugging into that larger network, our multithreaded processor cores running the protocol stack and control plane of the modem implementation inside the smartphone SoC are very well suited for this kind of problem.

LR: Taking a bit of a fork in the road, here, wasn’t part of the fallibility with the Spectre flaw that each discipline is used to working in their own world, hardware or software? Nobody can hack physical traces and a PCB unless they have physical access. But this was something that was a vulnerability…. What are your thoughts on that?

MT: People are trying to hack security all the time, over networks, and in devices. A lot of that has to do with trying to figure out ways to get around hardware-implemented items. The Spectre and Meltdown vulnerabilities with respect to speculative executing CPUs are not necessarily fundamentally different than other attempts to find back doors.

LR: I think it’s commendable that MIPS had only two cores that were potentially vulnerable.

MB: A look at the Intel architecture would indicate that Intel likely runs speculative execution on many of its processors. As you move on to more of an embedded, and let’s say IoT architecture, for that matter, the problem starts to diminish. It depends on the architecture that you have around it.

LR: Speaking of other architectures, do you perceive that RISC-V, being open source, is a threat?

MT: RISC-V is clearly a viable option. [But while] a lot of momentum has been gathered around it— name brands—when you look at the architecture for CPUs and the multiple components from a licensing perspective, that is an insignificant portion. There are a lot of challenges associated with implementation of the architecture that translate to significant amounts of dollars in cost and maintenance. It takes time to develop a good ecosystem, as well. In my experience, it takes five to seven years for the ecosystem around an available architecture or microarchitecture to become stable. While there is momentum behind RISC-V, it is fragmented today. Companies have to expend a lot of effort to go into it from many microarchitectural angles, with the aim of bringing it up to the levels that either Arm, or MIPS, or other architectures have been at for decades. At MIPS, we continue to innovate. But for other architectures, there are probably five or six different ISAs out there at any given time that may not last in the long term.

MB: I agree that RISC-V is fragmented to a great extent. There are a lot of boutique shops and a lot of talk about cores that are being developed around it.

MT: However, there’s a difference between momentum and completeness. RISC-V as a technology or as a full specification, relative to what’s available on other architectures, is not as complete. As an ISA, RISC-V is starting from scratch and although people are offering various RISC-V solutions, they also have to fill in the blanks somehow, and that opens up the idea of filling in those blanks in different ways. And RISC-V is not free. The idea is to provide an open source alternative to Arm and Intel, which are probably the top options, but that is simply allowing for collaboration of companies at the architecture level. You don’t build architectures; however, you build micro-architectures, and you build chips. And you build the software that runs on top of those systems and all the optimizations that happen to the architectures.

LR: Arm enjoys some of the benefits of open source in that both are widespread and have a huge ecosystem.

MT: Lots of open source software runs on Arm, but a lot of open source software runs on MIPS and is readily available on MIPS. In fact, when it comes to something like Linux, that is, as a focal point running on MIPS, a very large portion of MIPS runs Linux or open source software-based designs.


Lynnette Reese is Editor-in-Chief, Embedded Intel Solutions and Embedded Systems Engineering, and has been working in various roles as an electrical engineer for over two decades

 

 

 

 

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