Calendar of Events

CDNLive! EMEA 2012

Dolce Hotel
Munich, Germany 14-16 May 2012 http://www.cadence.com/cdnlive/eu/2012/pages/default.aspx
Semico IMPACT Conference Series: The IP Ecosystem

San Jose, CA May 16, 2012 http://www.semico.com/eventimpact/impact.asp
GPU Technology Conference 2012

San Jose, California May 14 - 17, 2012 http://www.gputechconf.com/page/home.html
RTECC - Real-Time & Embedded Computing Conference

Mahwah, NJ May 17th, 2012 http://www.rtecc.com/conferences/view/89
DAC 2012

San Francisco, CA June 3-7, 2012 http://www.dac.com/dac+2012.aspx
X-Fest 2012

Dallas - May 22nd
Minneapolis - May 24th
Toronto - June 5th
Vancouver - June 7th -- http://www.weboom.com/avnet2012/
IPC Conference on Flexible Circuits

Irvine, California June 12–14, 2012 http://www.ipc.org/calendar/2012/flex/flex-conference.htm
Freescale Technology Forum 2012

San Antonio, Texas June 18 - 21 http://www.freescale.com/webapp/sps/site/overview.jsp?code=FTF_2012_AMERICA_HOME_CAT&tid=vanFTFAMERICAS
IMS2012 International Microwave Symposium

Montréal, Canada June 17 - 22, 2012 http://www.ims2012.org/
Symposium on Counterfeit Electronic Parts and Electronic Supply Chain

Colony Ballroom, Stamp Student Union
University of Maryland at College Park June 26 - 28, 2012 http://www.smta.org/counterfeit
SEMICON West 2012

Moscone Center, San Francisco, CA July 10-12, 2012 http://semiconwest.org/
4th Asia Symposium on Quality Electronic Design (ASQED 2012)

Eastin Hotel, Penang, Malaysia July 10-11, 2012 http://www.asqed.com/
IPC Midwest Conference & Exhibition

Renaissance Schaumburg Hotel and Convention Center
Schaumburg, IL USA August 22 - 23, 2012 http://www.ipcmidwestshow.org/
Atmel Technology Live (ATL)

San Jose Convention Center September 11-13, 2012 http://www10.edacafe.com/goto.php?http://www.atmel.com/atl
2012 Embedded Systems Conference - Boston

Boston, MA September 17-20 http://esc.eetimes.com/boston/
PCB West 2012 Conference & Exhibition

Santa Clara Convention Center
Santa Clara, CA USA September 25 - 27, 2012 http://www.pcbwest.com/

Featured White Papers

LTE-Advanced Signal Generation and Measurement Using SystemVue
LTE-Advanced is specified as part of Release 10 of the 3GPP specifications and is now approved for 4G IMT-Advanced. This application note introduces key LTE-Advanced techniques, as well as how to use the Agilent SystemVue W1918 LTE-Advanced library to generate various downlink (DL) orthogonal frequencydivision multiple access (OFDMA) and uplink (UL) clustered DFT-spread-OFDM (DFT-S-OFDM) signal sources with MIMO, and to measure closed-loop throughput.

This application note also introduces LTE-Advanced enhancements to the MIMO channel models, which are available as simulation model set called the W1715 SystemVue MIMO channel builder. This optional model set facilitates simulation-based MIMO over-the-air (OTA) testing using real, observed antenna patterns and standard MIMO fading models, and overcomes a key challenge for 8-layer MIMO system analysis and verification.
Linking Early Mechatronic System Analysis to Physical Testing
Mechatronic system design creation and test development are often at opposite ends of a project's schedule. Benefits accrue in improved system quality and on-time delivery when design and test are pursued concurrently. This paper describes the technologies required to make concurrent design and test possible.
Best Practice Development Processes for Medical Device FPGAs
For FPGA developers working on designs for medical devices, one approach to dealing with regulatory uncertainty is to borrow heavily from design assurance processes in other safety-critical industries, such as avionics, where standards are well established. These well-established standards mandate a development flow that is controlled, auditable and perhaps most important, specific to the requirements of hardware engineering. While following such a flow will not guarantee smooth sailing though every regulatory approval process for FPGA devices bound for medical applications, it is consistent with basic regulatory intent - to demonstrate to auditors that complex devices meet their requirements and perform well under all foreseeable conditions.
Direct Power MOSFET Capacitance Measurement at 3000 V
Learn how to make power MOSFET capacitance measurements at up to 3000 V of DC bias.
Common Pitfalls in PCI Express Design
PCI Express is a point-to-point communications interface. It is neither an evolved nor enhanced form of PCI or PCI-X, but, essentially, a high speed, low voltage, differential serial pathway for communication between two devices, although it uses the same programming model as its predecessors.
Increasing Revenue Through Continuously Optimized Data Center Management
Most businesses are completely dependent on technology, and the impact of using non-optimized technology can be directly measured in their revenue. Why? Because as widespread dependence on technology has grown, the size and complexity of the technology’s environment has grown in a non-linear manner.
Designing For Low Power
Power consumption is becoming an increasingly important variable when it comes to calculating OPEX and carbon footprint for telecom infrastructure projects.

CDNLive! EMEA 2012

Dolce Hotel
Munich, Germany 14-16 May 2012
Semico IMPACT Conference Series: The IP Ecosystem

San Jose, CA May 16, 2012
GPU Technology Conference 2012

San Jose, California May 14 - 17, 2012
RTECC - Real-Time & Embedded Computing Conference

Mahwah, NJ May 17th, 2012
DAC 2012

San Francisco, CA June 3-7, 2012
X-Fest 2012

Dallas - May 22nd
Minneapolis - May 24th
Toronto - June 5th
Vancouver - June 7th --
IPC Conference on Flexible Circuits

Irvine, California June 12–14, 2012

Parasoft approaches comprehensive testing for embedded software
The explosive growth of portable and wireless technology is a driver for similar growth in embedded software development....
Automating embedded software testing with Electric Cloud
The problem comes in when you are not a software-centric company. The 2012 UBM Embedded Market Survey showed that, for the first time, QA engineers are becoming a significant portion of embedded software teams, and while the quality of debugging tools is still the top area for improvement, engineers seem to be getting more confident with what is available. However...
Strategy And Technology: One On One With Wally Rhines
Mentor's Chairman and CEO sounds off about where the IC design challenges are, what needs to be done to fix them, and what new opportunities will unfold.
One-On-One: Jack Harding
eSilicon's CEO talks with System-Level Design about changes in design at advanced nodes, the power of 2.5D and 3D stacking, and how the semiconductor supply chain is changing.
One-On-One: Naveed Sherwani
Open-Silicon’s CEO talks with System-Level Design about getting the business priorities of designing a complex SoC in line with the technology; why getting chips out the door on time is critical and why it’s not happening.
Walter Ng, GLOBALFOUNDRIES at DAC 2011 - IP Talks presenter
Interview with Walter Ng, Vice President, IP Ecosystem, GLOBALFOUNDRIES. DAC 2011. Demonstrating 32/28nm design, 20nm technology. Design Enablement, ChipEstimate.com IP Talks 2011
Verification: What's in Your Wallet?
This DAC Pavilion Panel explores technical and business issues related to SoC verification by panelists from ARM, AMD and Qualcomm.

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