Embedded Masterclass shows how to make the best use of SoC FPGAs in new designs



Designing systems based round FPGAs with integrated ARM processors can be challenging for engineers, but the basics will be explained in a talk due to be held at this year’s Embedded Masterclass, which will form part of National Electronics Week at the NEC in Birmingham from 8 to 10 April 2014.

UMR’s Embedded Masterclass, a dedicated engineering design conference for the embedded community, will take place alongside the National Electronics Week exhibition.

Stefano Zammattio from Altera will explain how bringing the two technologies together on one die has enabled them to be integrated to a level that simply was not possible when they were in discrete device packages.

“This brings higher performance and capabilities that were not possible before,” said Zammattio. “As these capabilities were not possible previously, developers have little experience of the issues that can arise and can easily develop sub-optimal systems.”

The class will also explain how to move from designing with a single-core provcessor to one using two or more cores. Zammattio will look at the issues when designing with dual-core processors, notably AMP and real-time systems, and give guidance on how to design high-performance SoC FPGA systems.

Bringing Embedded Masterclass and NEW together will help delegate make best use of their time away from the office, giving a opportunity to learn and engage with key industry experts in one arena. The exhibition will have a focused Embedded Zone that will include the best in the industry. The seminar and workshops theatres will be integrated into this area giving delegates plenty of time to engage with suppliers, view demo areas and discuss industry issues in one location.

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