28nm—FPGAs Lead the Way in Semiconductor Innovation & Value


I predict that for many years into the future, semiconductor industry watchers will point to the 28nm process node as an era of vast semiconductor innovation and value led by FPGA vendors. At the 28nm node, FPGA vendors are taking pioneering steps into the world of 3D IC design by today shipping 2.5D stacked-silicon interconnect (SSI) FPGAs that shatter logic-capacity records and break Moore’s Law. At the same node, FPGA vendors are also broadening their markets to innovate an entirely new class of device called extensible processing platforms (EPPs)–processor–boot–first devices that will be attractive to software engineers, as well as hardware engineers. The 28nm node will also be seen as a time when a greater amount of analog functionality was integrated into FPGAs for new levels of system integration.

For over four decades, the semiconductor industry has been religiously following Moore’s Law, which holds that the transistor counts of devices will double every 22 months in lockstep with the introduction of each new silicon–process technology. All semiconductor vendors, especially FPGA vendors, have followed this law for decades.

28nm will go down as the node where FPGA vendors broke Moore’s Law. In the fall of 2011, Xilinx shipped a 28nm FPGA that has over two–million logic cell (equivalent to 20 million ASIC gates)–that’s over 2.5 times the capacity of the largest 40nm FPGA. We achieved this by implementing the device using 2.5D SSI technology, in which we place four FPGA slices (essentially FPGA dice) side–by–side on top of a passive silicon interposer. The passive interposer essentially functions like a PCB, facilitating the connections between the four die on the device (10,000 connections between each adjacent slice).

Many folks may view 2.5D as an intermittent step toward true, 3D IC, active–die–on–die stacking, but I predict 2.5D will prove to be a landmark technology in and of itself. For example, in the next 12 months, vendors will use this 2.5D SSI approach to field 28nm devices that place high–speed interconnect slices alongside FPGA slices on the same interposer, breaking bandwidth records in addition to Moore’s Law. This SSI technology will allow semiconductor companies to offer innovative new devices and allow customers to achieve new levels of integration, reducing BOMs and lowering overall system power consumption. SSI Technology will be big.

In addition, at the 28nm node, vendors will begin to broaden their markets by introducing EPPs. For well over a decade, FPGA vendors have offered FPGAs with microprocessor cores pre–built into FPGAs or have offered soft microprocessors that users could implement in a given FPGA’s programmable logic. All these devices typically required users to program the FPGA to get the onboard processor to function. In this new class of device, the EPP, the processor boots first at startup. In fact, in the case of the Zynq–7000 from Xilinx, the device could be used as a standalone ARM processor and programmed out of the box by software designers who’ve never used or even heard of an FPGA. But the real value of such a device is that users will be able to make hardware and software tradeoffs quickly and offload functions to the programmable logic to achieve optimal system power and performance and innovative functionality for an untold number of applications.

Last but not least, the 28nm is facilitating the integration of more analog functionality onto FPGAs. Traditionally, most systems that incorporate an FPGA have required some degree of analog circuitry – A/D and D/A at a minimum – to allow the FPGA to communicate with other devices. Traditionally, this analog circuitry has been located on another chip. Having this circuitry now located on the FPGA improves performance, saves power and space requirements and reduces BOM–all increasing the value of the FPGA to the overall system.

The 28nm node is a landmark node for semiconductor innovation led by FPGA firms…you won’t forget it.



Vin Ratford is senior vice president of worldwide marketing, with responsibility for enabling sales to drive company revenue and profitability for Xilinx flagship programmable platforms, including silicon, design tools, methodologies, IP, boards and enabling technologies. Ratford joined Xilinx in 2006 when the company acquired Accelchip, where he served as president and chief executive officer.

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