Solving Signal Conditioning and Processing Challenges in Multi-Sensor Applications with FPGAs

MicroTCA is a low-cost, open-standard architecture increasingly being adopted in mil-sensor processing, RADAR, network security and other applications utilizing FPGAs.

Many mil/aero and other applications require the data from multiple sensor inputs to feed into highly connected FPGA clusters. In many of these applications, there is a desire to minimize the size, weight and power (SWaP) utilized, and this is particularly the case if the system is in an airborne platform. With budget cuts, even mil/aero projects are demanding more cost-effective solutions. So how does one find a lower-cost, compact solution that can handle the signal conditioning, pre-processing and post-processing/formatting in the FPGA cluster?

MicroTCA-based FPGA Cluster
MicroTCA is a low-cost, open-standard architecture increasingly being adopted in mil-sensor processing, RADAR, network security and other applications utilizing FPGAs. The advantages are high performance, a vast ecosystem of off-the-shelf products from multiple vendors and low cost in a proven architecture. Since MicroTCA is truly COTS and utilized in many bleeding-edge telecom/networking applications, designers benefit from the latest technology advantages and economies of scale from numerous markets.

Figure 1: An application-ready platform for mil-sensor processing with 5 FPGAs, 1 PrAMC, integrated AC power and shelf management.

For a mil-sensor application, let’s take a 6-slot cube (12.25” tall x 5” wide x 9” deep) as an example. See Figure 1 for an application-ready platform example. For high-throughput signal conditioning and processing, up to five Virtex-7 FPGAs can be utilized. It is important that each module is supported with significant local memory for intermediate data storage with high-bandwidth access. Since there is a large amount of data sharing between the FPGAs, they need to be interconnected by high-bandwidth links for low-overhead data transport. Two 10GbE ports can be used with channel bonding to provide an aggregate output rate of up to 20Gbps. The data input with specific sensor interfaces would come via the FPGA mezzanine cards (FMCs) which plug into the advanced mezzanine cards (AMCs) of MicroTCA. In this example, the post-processing and data flow management to the network is best handled via a host general-purpose processor (GPP). An octal-core QorIQ processor such as a P4080 can do the trick. It provides strong processing capability and includes hardware acceleration for networking tasks. See Figure 2 for a model showing the interaction between the AMC modules in the system.

Solving Inherent Challenges
Packing this much processing power in a small size is bound to create challenges, including thermal management. Dissipating heat from power-hungry FPGAs can be a hurdle. Having the option to support full-height (6 HP) AMCs is an advantage, allowing larger heat-sinks than would be possible with mid-height (4 HP) modules. In this chassis example, a design trick was to tilt the AMCs by a few degrees. This small tilt assists airflow in the entry and exit plenums (in a push-pull configuration with front-to-rear airflow) and is vital in fitting the required thermal performance into a 7U chassis. Failure to incorporate this solution would have required the chassis size to increase to 8U for equivalent cooling performance.

Another concern in the FPGA cluster is stressing the system host while performing the signal conditioning and processing. To avoid this issue, a typical solution is to incorporate a QorIQ or other processor into the design of the FPGA-based AMCs. This on-board ‘host’ makes the module very versatile, supporting intelligent FPGA load and initialization functionality. This can significantly reduce the workload on the system host and improve system boot times.

Figure 2: This diagram shows the general processing chain using VadaTech’s AMC515 Virtex-7 FPGAs and AMC713 Freescale P52020 processor module.

It is also advantageous if the FPGA-carrier AMC has options available to incorporate various levels of FPGA (from Artix to Virtex-7 for example). This allows users to balance processing power against cost and thermal constraints.

One of the nice things about MicroTCA is that the specification defines the pinout for the options of GbE, PCIe, SRIO or XAUI interfaces. These ensure interoperability across platforms and from multiple vendors. In addition to the base (GbE) and switched fabric (PCIe, SRIO or XAUI) interfaces, the MicroTCA standard incorporates an ‘extended options’ region that supports high-speed, point-to-point connections. These pins can be routed to Aurora connections on the Virtex-7 FPGAs housed on the AMCs. The connectivity provided lends itself to a high-bandwidth processing pipeline where a level of data reduction happens in the initial processing stage.
Another tool that makes life easier in development is the JTAG Switch Module. It provides a direct plugging option to ease FPGA programming. Also, having integrated AC or DC power options makes development easier.

Explore the Possibilities
With a wealth of FPGAs in the AMC form factor for MicroTCA, there are a wide range of capabilities available at various price levels. The FPGAs accept FMCs per VITA 57, adding to the mix dozens of vendors with all types of solutions. Utilizing an application-ready platform for sensor processing can be a time-saving step to help a designer with their solution.


Ian Shearer heads up VadaTech’s UK subsidiary, managing sales and technical support for the EMEA region.  He moved to VadaTech from Mercury Computer Systems, where roles included sales, product management and business development.  Previous roles, including a long period with BAE Systems, were primarily in R&D with a focus on signal processing.

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