Time for a New Approach to Video Bridging

As the I/O landscape for automotive, industrial, and other applications continues to evolve at near breakneck speed, designers need a single programmable video bridge that supports multiple uses.

Take a walk around a recent MIPI Development Conference and it’s easy to see how fast the I/O landscape is changing. The rapid proliferation of image sensors and displays and the escalating adoption of new low cost MIPI standard interfaces has spurred innovation and allowed designers to take advances from the mobile arena into a far wider array of applications. But to reap those enticing power and cost benefits, today’s designers must typically interface to legacy systems that in many cases represent years of investment. They must cope with I/O that can range from legacy CMOS and proprietary interfaces to source synchronous standards to interfaces that feature an embedded clock for larger systems.

Figure 1: Encompassing support for larger pitch packages, required by industrial and automotive applications, must be a part of any successful programmable bridging solution, notes the author. [Source: fotolia]

Figure 1: Encompassing support for larger pitch packages, required by industrial and automotive applications, must be a part of any successful programmable bridging solution, notes the author. (Source: shutterstock)

The number of potential bridge applications in today’s systems is enormous. Every time an interface doesn’t match between an image sensor and a processor, or between a processor and a display, a bridge is needed. And every time the number of interfaces between a processor and an image sensor or display does not match, a bridge is also needed.

Given the large number of interface permutations such as the number of PHYs and bits per pixel, not to mention the specific cost, power, and footprint requirements unique to each application, designers will probably never have a one-size-fits-all solution. From the silicon manufacturer’s view, developing a bridge IC for a singular use case is typically not cost effective. So it’s difficult to find silicon for non-typical applications and to develop the IP and architectural knowledge needed both from a historical point of view and looking forward.

What designers need is a single programmable video bridge that’s capable of supporting multiple uses. Imagine, for example, the same programmable device that could serve as a camera interface bridge between the image sensor and the applications processor or as a display interface bridge between the applications processor and a display.

Programmable Bridging

What form would this device take? While FPGAs have been used in non-typical bridging applications, they have never been able to meet the low cost of an Application Specific Standard Part (ASSP). Ideally designers need a device that combines the design flexibility and fast time-to-market of an FPGA with the power and functional optimization of an ASSP. Whatever form this device takes, it must provide an end-to-end solution for common use cases. To achieve that, it must supply the IP the market requires. For display applications this might include:

  • DSI-to-DSI
  • DSI-to-dual DSI
  • Dual DSI to dual DSI
  • DSI to LVDS
  • DSI to DPI
  • Single LVDS to DSI
  • DPI to DSI

On the camera side, it should support IP for bridging applications including:

  • Dual CSI-2 to CSI-2
  • CSI-2 to parallel CMOS
  • Parallel CMOS to CSI-2
  • SubLVDS to CSI-2

This programmable bridging solution would ideally support configurable data types, configurable numbers of data lanes and PHYs, adjustable input and output frequencies, DCS command ROM and IP customization. Finally, any bridging solution of this type cannot force designers to pay a penalty for using programmable logic. It must offer those benefits in a form factor that is competitive in terms of power, size, and cost compared to other silicon solutions on the market. This includes wafer-scale packaging and larger pitch packages to support industrial and automotive applications.

Why “Just Enough” Works

Lattice has recently released a device that offers a variety of interfaces, some programmable and some hard, surrounding a programmable FPGA fabric. By offering just enough FPGA fabric and RAM, it can supply all the logic and memory designers need to support muxing, merging, demuxing, arbitration, splitting, data conversion, and other key functions.

This programmable ASSP (pASSP) comes with all the required IP to cover common use cases and allows the designer to derive other capabilities from there. System developers can use different firmware loads to most efficiently leverage the programmable logic and memory on-chip. By selecting which interfaces are needed and which are not, as well as I/O speed, the designer can generate bridges for multiple use cases using the same programmable device.

Clearly bridging solutions have played a key role in innovation that extends well beyond simply resolving unexpected interface issues or enabling backward compatibility. Over the past few years bridging solutions have helped designers create entirely new use cases far beyond their original intention. Look for this trend to accelerate as designers adopt new approaches to bridging that combine the best aspects of programmable logic and ASSPs.

GrantJennings_formalGrant Jennings is a Senior Strategic Planning Engineer for Lattice focused on identifying new ways to drive adoption of programmable technologies through next-generation solutions based on leading connectivity and interface standards. He has more than a decade of experience in FPGA design, ASIC prototyping and system architecture. Jennings received his bachelor’s degree in electrical engineering from Iowa State University and his MBA from Texas A&M University.

Share and Enjoy:
  • Digg
  • Sphinn
  • del.icio.us
  • Facebook
  • Mixx
  • Google
  • TwitThis
Extension Media websites place cookies on your device to give you the best user experience. By using our websites, you agree to placement of these cookies and to our Privacy Policy. Please click here to accept.