Enabling Accurate Glucose Measurement



Designing a glucose monitoring device is made easy with an 8-bit, 8051-based Programmable SoC

When you go to your local pharmacy, you’ll find glucose measurement strips that, when plugged into a deceptively simple handheld meter, quickly (but not necessarily painlessly) gives you a reading of your blood glucose level. Each strip contains a tiny quantity of a substance that reacts with the glucose in your blood. The chemical reaction with your blood yields a tiny charge that enables electrical measurement of your blood glucose level.

Measurement methods vary, but they generally require measuring small electrical currents at specific times, calculating a tiny total charge over a specific period, or measuring impedances under specific conditions. Thus, sensitive analog signal processing, high-resolution data sampling, unique timing control, and digital data processing are often necessary features for glucose meter operation.

The chemical reaction between the blood and the agent on the strip results in a very small charge that is measurable with sensitive circuits. To measure a small current signal, an active trans-impedance amplifier (TIA) is often employed, along with a voltage reference on the TIA to set a bias on the cell. Figure 1 shows a simple schematic example of this idea.

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Figure 1: Trans-Impedance Amplifier

The nature of the chemical reaction with glucose in the blood and the enzymes on the test strip can result in a large initial transient in the current with a much more moderate current towards the tail end of the reaction. In a basic static design such as is shown in Figure 1, the TIA gain is fixed. The TIA feedback resistance, ADC input range, and the ADC resolution will need to be carefully selected in order to meet minimum sensing requirements, which is a challenge with this fixed implementation. The TIA and ADC will need to be able to handle a large transient condition while maintaining the bias on the glucose test strip. In general, this is an order (or more) magnitude higher than the sensing often necessary towards the tail end of the reaction. The transient will limit the resistance of the feedback to smaller values to ensure that the TIA does not clamp at the rail and cause the glucose test cell to lose its bias, and the high sensitivity implies the need for a very high resolution ADC in order to sense the very small changes over the entire operating range.

One advantage with a programmable SoC is the ability to create a programmable gain TIA and dynamic ADC ranging. The availability of a programmable routing fabric enables the TIA to be created with multiple gains; Figure 2 shows a design with two gain settings though more are possible. These gains can be hand-picked to optimize different aspects of sensing a reaction. For example, a low gain setting can deal with large transients while maintaining bias on the strip and providing valid readings to the ADC, while a high gain setting can greatly increase the sensitivity of the TIA without requiring high resolution on the ADC or a low noise amplifier. Figure 2 shows a significantly enhanced programmable signal chain with some additional features thrown in.

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Figure 2: Enhanced Trans-Impedance Amplifier

The use of a differential ADC in Figure 2 allows the analog routing resistance and op-amp offset to be eliminated from the measurement. This measurement scheme is superior to the single-ended method shown in Figure 1 where the bias voltage narrows the useable ADC input range. Any input offset on the op-amp is eliminated with a differential measurement across the feedback resistance. The analog routing fabric allows true differential measurements across the multiple feedback resistances, providing the maximum possible accuracy for the system, regardless of the selected gain. Other enhancements include an adjustable current offset compensation DAC with precision sensing to provide the ability to sense very small current variations on top of a large DC bias current if desired.

Combining the analog capabilities with the digital fabric and other digital resources such as Direct Memory Access (DMA) further increases flexibility and measurement capability. For example, a make-before-break switching scheme can easily be employed in the routing fabric to ensure that the bias is always applied, even when changing TIA gains. Precise data structuring and movement from the ADC to memory can be managed through DMA. Designers also have the option to program the DACs to manage a time-varying signal on the glucose test strip to gather AC information while simultaneously managing precise data movement.

For example, figure 3 shows one way to implement a highly integrated data management system. In this example, a PWM block is used as a source for timing management. Like almost any digital PWM, it is quite capable of this type of management given the ability to program exact edge placement of the output signal. Thus the edges can be used to precisely trigger events at specific times. PWM1 output is used to trigger the DMA to autonomously take a pattern from SRAM and transfer it to the DAC to generate a particular bias signal across the glucose test strip. Synchronous with the bias pattern, the ADC is triggered with PWM2 output to start taking data, with the results being completely managed through DMA. It is even possible to use DMA to manage the amount of data taken (i.e. take 5 samples then stop until next trigger).

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Figure 3: Digital Integration for Managing Data

Most of the general timing and data gathering work is directed in the processing subsystem while the harder timing critical work is performed in other parts of the programmable system. The terminal count (TC) of the PWM’s timer in Figure 3 is used in this case for linking timing of the data gathering analog-front-end (everything shown up until now) to the processing subsystem. Thus it is possible to synchronously manage the state flow of the glucose meter process by getting interrupts every cycle.

For example, each interrupt from the PWM (see Figure 4) can be used to manage a bit of information to be shown to the user on an LCD (i.e. processing… 3, 2, 1, done). Thus the processing sub-system – an 8051 in this example – manages the general state flow of the system displaying information, taking information from the user (i.e. a button or a chemical strip insert), and most translating acquired data into a user-friendly format (at the very least something friendlier than a lance in the finger). Remember that as the DMA is handling a large portion of the sensing and data management, the processing load is generally minimal, enabling the CPU to disable various functions, including itself, to minimize power consumption for higher battery operating life.

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Figure 4: Digital Integration for Processing Data

The ability of an SoC to offload tasks into the hardware makes it possible to design extremely power-efficient designs. The system on a chip approach to implementing a glucose meter provides a tremendous flexibility and freedom to implement both essential and value-added features without a significant development investment. Analog-front-end improvements like offset elimination, dynamic customized TIA gains, and a flexibility to adapt to a wide range of sensing approaches with the same hardware are possible when designing with a programmable SoC. Further enhancements made possible by the SoC architecture include fully-customizable hardware based design, thus freeing up firmware designers to focus writing high quality, robust code without micro-managing every sample and transaction that must occur in the sensing design. Just because taking a glucose measurement can be a painful experience doesn’t mean designing a glucose meter has to be painful too.

 


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Ross M. Fosler is an Applications Engineer and Member of the Technical Staff at Cypress Semiconductor Corporation, a leading supplier of innovative Programmable System on Chip technology. Mr. Fosler has more than 12 years of diverse professional experience covering a wide variety of applications including embedded systems and firmware design, digital design, and power systems control and management design. For over 20 years he has been programming small processors and microcontrollers, experience that has helped him in both directing and development roles in the industry where he has lead teams and personally developed many successful solutions for 8-bit and 16-bit embedded systems in the power, industrial, and consumer markets. Mr. Fosler’s research interest resides in control theory, power electronics, and high performance real-time embedded processing. Mr. Fosler has 8 patents credited to him. He is also a veteran of the US Air force as well as a member of IEEE, HKN, AOC, and other organizations.

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Chris Keeser is Staff Applications Engineer at Cypress Semiconductor working with the Programmable System on a Chip (PSoC) 3 and 5 platforms. Mr. Keeser has worked on many embedded systems with a special interest and focus on high performance analog-front-ends (AFE) for sensitive analog designs. With his expertise he has developed and assisted the development of several specialized AFEs for glucose meter applications using PSoC technology. Chris received his Masters of Science in Electrical Engineering from Washington State University and has over 9 years of experience working with microcontrollers and embedded applications.

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