Next Generation of Xeon Processors Rolls Out at IDF

New processors to tackle applications ranging from superservers to connected IoT solutions took center stage at this year’s Intel Developer Forum. Intel rolled out its next-generation of Xeon processors with up to 18 cores—the E5-2600 v3 family —as well as its Core M series of dual-core low-power (sub 4.5 W) processors. These are targeted at ultrabook laptops and 2-in-1 laptop/tablets, as well as embedded applications. For more deeply embedded applications like those encountered in the Internet of Things (IoT) Intel also spotlighted its Edison compute platform. The platform is a postage-stamp sized module based on the company’s low-power dual-core Quark SoC processor. The module includes both WiFi and Bluetooth low-energy wireless interfaces in addition to general-purpose I/O ports and a gigabyte of DRAM.

For embedded developers, various application demos using the Galileo development board garnered lots of interest in the IoT zone at the conference. In the zone, demonstrations such as a smart Internet-connected wheelchair, an intelligent beer-keg monitoring system and various industrial monitoring solutions, all highlighted the use of the Galileo board. Advances in system support also kept the conference buzzing—discussions looking at USB 3.1, which can supply up to 100 W while moving data at 10 Gbits/s, the upcoming PCI 4.0 interface that delivers 16 gigatransfers/s, NVMe low-latency storage interfaces, and the RealSense optical sensing subsystem that is being embedded in the camera subsystems of next-generation tablets or used in feature-rich digital cameras or as a peripheral to other systems. In addition to all of Intel’s developments at the conference, many of the other companies that form the eco-system supporting the x86 family also unveiled new chips, software support, diagnostic tools, and systems that leverage the wide range of processors and other components developed by Intel.

bursky_daveDave Bursky is a contributing editor for Embedded Intel® Solutions and Chip Design.

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