Once Earmarked for FPGA, Always Earmarked for FPGA?
The board would have used an FPGA approach to speed processing and I/O. Then it became possible to leverage Intel® architecture and next generation network and IA advances to meet IT, cloud and call center demands.
Once marked to rely on FPGAs and ASICs, high-performance computing projects have another option. OEMs are turning to Intel® architecture (IA) to save time with easier implementation in a less complex development environment.
However, in areas where real-time response is a critical requirement, FPGAs are a good choice. And that is also true for cases where, no matter the size of the datastream, monster I/O is required. Certain networking, financial or military/aerospace applications for which near instantaneous timing is critical need FPGAs. Moreover, specific I/O requirements might need the fine-tuning inherently available in FPGAs. On the other hand, for applications that do not have a critical need for real-time data disposition, IA can offer a less burdensome development approach.
FPGA Design Considerations
Due to both out-of-pocket and opportunity costs, it can make business sense to avoid FPGAs. First, the expertise required to successfully develop a relatively complex FPGA is expensive, as it represents a highly specialized skill set. Second, longer development times mean slower time-to-market resulting in lost revenue or opportunity costs. Serious development projects are generally done with high-end FPGAs, so there is that element of up-front expense as well. In addition, development boards and software module licenses may be required, further adding to development costs before the project even begins.
The standard languages of FPGA, such as HDL, VHDL, and Verilog, are essentially hardware/firmware design languages. They are great for designing microprocessors, but hard to use and not at all intuitive. They sometimes use similar terms, but with markedly different effects. The same inconsistency is true regarding the basic architectural features of the FPGA between the major manufacturers. This is true of both the feature naming and configuring their internals. Naming and feature inconsistencies often make FPGAs hard to compare to one-to-the-other or to size for a particular project.
An FPGA’s three basic features, Logic Blocks, I/O Blocks and the metallic matrix that surrounds them, are all configurable. Think of it—every gate in this “sea of gates” is configurable. This generally makes for a long and complex development process. In the absence of optimal routing and/or timing, attempts to resolve compute efficiency, space, or power management issues can prolong the development process.
Speeding New Product Development
Both FPGA and IA only cover the processor part of the new product equation. Both processor types must be designed into an embedded computing device (board or boards) and chassis of some sort. Concurrent with the processor design and embedded computing development task is software development for the FPGA.
However, OEMs working in IA get to truncate the process because their chosen processor is already designed, with power, heat, I/O, and performance factors both known and well documented. A pool of resources, including Intel’s ecosystem of users and designers, helps keep IA mature, stable, documented and—most importantly—debugged. Leveraging the GbE of an Intel Atom C2000 can take place by downloading a driver, freely available, without having to build it from gate and block arrays. C2000 can take place by downloading a driver, freely available, without having to build it from gate and block arrays.
Figure 1 shows the steps for an IA approach and for an FPGA approach for a typical hardware design cycle. With IA, much of the specification, design and testing is done by Intel during CPU/SoC design and manufacturing. Integrators then select the chip based on clearly defined performance, I/O and power parameters. Further testing of the final product can be as simple as using industry standard, or even open source testing tools that are already designed for use in IA.
Figure 1. An FPGA approach essentially adds a separate fork of development cycle for the FPGA circuit (which can be viewed as a product in and of itself).
Other factors helping to shorten development time when opting for IA are the supporting software tools available from the Intel ® Internet of Things (IoT) Alliance ecosystem. In addition, the object oriented programming languages used, such as VisualBasic, C, C++, and php, are far more common and have a huge pool of users already available.
Consider too the ever increasing performance of Intel® processors and other developments, such as the Intel® Data Plane Development Kit (Intel® DPDK*) and integrated Intel® QuickAssist acceleration Technology.
Intel DPDK is open-source software for developers. It consists of a set of data plane libraries and network interface controller drivers to enable fast packet processing on IA platforms. Its scalable programming framework for processors spans the Intel® Atom™ to Intel® Xeon® processors. Faster development and easier porting of existing high-speed data packet networking applications is possible and uses existing Intel® hardware.
Software Enhancements Raise Performance Levels
Certain networking functions, especially those that are security related, are major performance sinkholes in today’s networks. Integrated into the new IA SoCs like the Intel Atom processor C2000 family and Intel® DH8900 PCH, Intel QuickAssist Technology speeds up computational operations, such as cryptography, data compression and pattern matching.
Figure 2 shows one approach to accomplishing the seamless convergence of communications and computer networking. Dedicated tools like the Intel DPDK and Intel QuickAssist Technology are major components in the strategy. Additionally, Intel has the System Design Studio** which is a software suite designed to analyze and better utilize additional offload functions (e.g.: AES-NI, AVX Extensions, etc.) previously requiring FPGAs or DSPs.
Figure 2. Intel’s Next Generation Networking, as expressed by IA, enables the integration of the various IT workload types.
WIN’s design of a preprocessing board, System on Network Interface Card (SoNIC), shown in Figure 3, is one example of using Intel architecture for what might have otherwise been accomplished with an FPGA. The board is an advanced networking preprocessing platform featuring a 2/4 core Intel® Xeon® processor, next generation PCH, integrated Intel® QuickAssist Technology and dual 10GbE on a single 3/4 length PCIe Card. Subsequent single board and blade models in this family are powered with Intel Atom processors C2000.
Board development took place in the context of WIN support the Next Generation Network, first by developing with a low power Intel® Xeon® processor and Intel DH8900 PCH, and then with the Intel Atom processor C2000 product family.
|Figure 3. The WIN SoNIC (IP-90380), an instantiation of the Next Generation Communications Platform from Intel®.|
The board was able to support advanced networking software using pre-processing techniques to speed processing and I/O by leveraging improvements in IA, integrations, Intel QuickAssist Technology and Intel DPDK. The ultimate goal is to accelerate the various networking tasks to meet the demands of today’s IT departments, the cloud, and call centers. Software for Next Generation Networking is open source, however integration and design services are also available from other ecosystem members such as Wind River, 6WIND, Radisys and Tieto.
The reason that Intel Atom processors C2000 were chosen over a similar FPGA setup was that they had the features our customer wanted, and Intel provided proof that the performance the customer required could be met.
Rather than spending development time on custom FPGA software to do the same thing, the customer optimized an operating system and bootable firmware that runs on the Intel Atom processors C2000 to perform the required functions, as quickly as necessary for their solution.
When it is not necessary to develop the FPGA driving software, let alone the FPGA itself, it’s possible to focus squarely on the application software. The availability of the Intel DPDK was an important deciding factor in selecting an IA approach for our customer’s new product development, which will span several variant solutions.
The IA nature of the project meant the OEM had the ready option to outsource the hardware aspects. By contrast, FPGA designs are done either in-house or outsourced by specialists who don’t always handle the entire design. Utilizing IA allowed both WIN and our client to limit the number of designers and fabrication plants involved, making for easier and more controlled project management. The customer’s solution can run to their needs using standard EFI firmware and open source software with relatively simple driver development from their existing pool of resources. This saved time compared to their previous FPGA design processes.
Many of WIN Enterprises’ current crop of platforms, custom boards and blades are powered by the Intel Ato processor C2000 (Figure 4). These SoCs feature up to eight cores. The diagram also utilizes popular storage and I/O options.
Figure 4. A sample layout using Intel NICs and 3rd-party (Marvell) Quad PHY Ethernet components.
Todd Sirois has held the position of Technical Project Manager/FAE at WIN Enterprises since 2006. This position incorporates Project Management, Sales/Sales Support and Technical Concept Development. In addition, Sirois helps manage the end-of-life (EOL) process for WIN embedded products. He has been employed in the PC hardware and software industry since 1998. Previous experience includes QA for AAA software titles at the Vivendi/Universal subsidiary Papyrus Design Group, Irrational Games (now 2K Boston).