SMARC 2.0’s Winning Strike
Bringing SMARC 2.0 into existence takes a strategy for successfully striking a balance between backward compatibility and future-oriented interfaces.
The Computer-on-Module (COM) specification known as Smart Mobility ARChitecture, or SMARC defines a full-size format (82mm x 80mm) as well as a credit-card-sized short format (82mm x 50mm) for small, energy-saving, stationary and mobile system designs (Figure 1). Since the Standardization Group for Embedded Technologies (SGET) launched SMARC in December 2012, the spec has firmly established itself. Today, all leading module manufacturers have SMARC products in their portfolios, with many system integrators offering custom carrier boards and system designs. More than a few OEMs are already using SMARC systems in high volumes.
With the coming release of SMARC 2.0, SGET has succeeded in striking a balance between the backward compatibility necessary to investment protection and support of new, future-oriented interfaces. Intel IoT Solutions Alliance Premier Member ADLINK Technology is a leading proponent of the SMARC specification and will implement the new standard immediately.
The main challenge of developing the SMARC 2.0 specification was to integrate the latest features of current SoC platforms while maintaining compatibility with the SMARC 1.1 pinout to the greatest possible extent. Only those pins for interfaces that were seldom used or likely to be replaced in the near future by more modern interfaces were candidates for reassignment. Also crucial: ensuring that a system would not be damaged if a 2.0 module were accidentally deployed on a 1.1 carrier board, or vice versa. As long as pinout changes are taken into account, SMARC 2.0 modules can be integrated into existing carrier boards, thereby extending the lifetime of existing designs beyond the availability of SMARC 1.1 modules. Most of the key interfaces supported by SMARC 1.1 remain unchanged in SMARC 2.0.
Because SoC Display Technologies Have Evolved…
The display technologies available on SoCs have evolved rapidly in recent years, leading to the addition of the Dual-mode DisplayPort (DP++) interface to the SMARC 2.0 specification, allowing support of Ultra HD/4K with up to 3840 × 2160 resolution. DP++ support also makes DVI and HDMI display output easier to implement, as all that is required is an electrical signal level conversion from Transition Minimized Differential Signal(ing) (TMDS) to Low Voltage Differential Signal(ing) (LVDS). This can be accomplished on the carrier board or via an add-on dongle. In addition, single-channel LVDS in SMARC 1.1 has been upgraded to dual-channel LVDS in SMARC 2.0, allowing the LVDS interface to drive either two low-resolution displays or one high-resolution display. Depending on the SoC used, the interface can support up to 1920 x 1200 pixels at 60Hz. The parallel LCD interface is no longer supported in 2.0, as these rather simple graphics are rarely supported in high-performance SoCs. Since the SMARC 1.1 HDMI/DP interface remains unchanged, developers can now connect up to three high-resolution digital displays via modern serial display interfaces. Existing carrier boards with single channel LVDS and HDMI can be used with SMARC 2.0 modules with no modifications.
Other changes include the number of generic USB interfaces. This number has grown significantly. While in the past there were just three USB ports (not counting Alternate Function Block pins), now up to six USB 2.0 ports and two SuperSpeed USB 3.0 interfaces are supported. This is particularly useful for high-bandwidth external storage devices as well as high-speed cameras and application-specific solutions such as frame grabbers or DSP cards. To maintain compatibility with SMARC 1.1 carrier boards, all existing USB interface pin assignments have been preserved.
Less Cabling, More Flexibility
Adding a second GbE interface benefits many industrial applications that simply loop this bus through to connect multiple devices in the field, reducing the amount of required cabling by allowing the implementation of line or ring topologies instead of star topologies. Native support of a second Ethernet interface is also a plus for IoT Gateways and PLC type applications, where one Ethernet port connects to a network of devices and/or sensors and the other to the management network. In field deployments the second Ethernet port allows daisy-chain setups, eliminating the need for network hubs to extend the network.
With the number of PCIe lanes now four instead of three, there’s more flexibility for functional extensions. Three of these PCIe lanes are backward compatible with SMARC 1.1. One of the two SPI buses has been upgraded to eSPI/SPI, and instead of triple I2S (I2S2 for HDA option) and SPDIF, 1x I2S (in ARM designs) and 1x HDA (in x86 designs) are now supported. HDA support offers particular advantages for system integration, as HDA codecs provide greater standardization than I2S. And thanks to continued I2S support, the flexibility and higher energy efficiency that this bus offers is not lost.
The SMARC 2.0 specification no longer supports a parallel camera interface and parallel LCD display, as parallel technologies are on the decline. In addition, support for eMMC/SD (8-bit)—in most cases already implemented on the module as boot media—was also deleted from the support list. The following interfaces are carried over from SMARC 1.1 and remain unchanged in SMARC 2.0:
- 1x SATA
- 12x GPIO
- 2x CAN
- 1x SDIO (4-bit)
- 4x UART
- 1x HDMI, 1x SPI
- 4x I2C
In SMARC 1.1, the possibility of multiple profiles led to different carrier board design variants that were not interchangeable. In SMARC 2.0 a dedicated fixed pinout replaces the rarely used Alternate Function Blocks (AFB) area.
Maximum Number of Interfaces in the Smallest Space
The new SMARC 2.0 specification is the ideal platform for highly integrated Computer-on-Modules in credit-card-sized form factor, supporting considerably more modern interfaces than competing COM specifications despite its much smaller footprint (Figure 2). The latest processors feature a high level of integration, and SMARC 2.0 leverages this, along with capitalizing on the move away from obsolete parallel technologies and towards serial buses.
SMARC 1.1 modules (Figure 3) are available with an impressive list of low and ultra-low power budget processors: Intel® Atom™ E3800, Intel® Quark™, Altera Cyclone V, Xilinx Zynq, Freescale i.MX6, Nvidia Tegra 3, TI and ARM Cortex A8 and A9. SMARC 2.0 paves the way for the newest and future low power consumption processors. See http://www.sget.org/product-listing.html for a list of available SMARC modules.
The first SMARC 2.0 modules to be released by ADLINK Technology Inc. will integrate the next generation of low and ultra-low power Intel® processors (codename “Apollo Lake”). For the first time a SMARC module will support three digital displays, Ultra HD graphics resolution at 60 Hz, and H.264/H.265/VP8/VP9 video decoding up to 4kx2kp60. Additionally, faster CPU and memory clock cycles will enable speedier data transmission and higher performance. Possible applications for the arriving generation of SMARC 2.0 modules with these upcoming Intel processors include mobile devices, industrial automation, medical technology, test and measurement, digital signage and transportation. Thanks to ADLINK’s proven Extreme Rugged technology, these new modules can operate in an extended temperature range of -40°C to +85°C.
Building Block for IoT Connectivity
All ADLINK SMARC modules are equipped with a Smart Embedded Management Agent (SEMA) board controller that fully integrates the device with ADLINK’s SEMA Cloud service, enabling remote monitoring and management of embedded SMARC platforms. The new SMARC 2.0 module will be an excellent building block for the development of devices that provide secure IoT connectivity to the cloud.
Using ADLINK SMARC modules (Figure 4) frees developers from the burden of designing the core system of their solution. While SMARC module designs use PCBs with from 8 to 12 layers, carrier boards usually require only 4, 6 or 8 layers, since the design of the peripheral interfaces is less complex. Offering design support for developers, ADLINK supplies sample schematics as well as signal and power integrity simulations. In addition, ADLINK provides custom carrier board design services and cooperates in each region with partnering design companies that offer SMARC carrier board design services. This level of support enables OEMs wherever they are in the world to quickly and efficiently achieve their specific application requirements with a custom modular platform.
Dr Harald Schmidts is Global Product Manager SMARC, ADLINK Technology, Inc.