How Intel PSG Takes the High Performance Road

High-level tools to dial FPGA power and efficiency up while cutting through complexity help

FPGA technology has origins in the early eighties with the advent of PROM, EPROM, and EEPROM solid-state memory devices. Although seemingly mature, the technology keeps threatening to emerge as the next big thing. Its early history saw healthy growth, first in telecom and networking, then in consumer, automotive and the industrial markets. Because it can be applied to any programming task, FPGA technology can address whatever the trending applications du jour are. Today’s application environments require increased computing performance and blistering data stream throughput for IoT, cloud, gaming, robotics, automotive, and more.

Sales for FPGA products in 2013 were $5.4 billion USD and are projected to be $9.8 billion in 2020, so it is safe to say growth remains solid. There was, however, trouble in paradise along the way. The traditional knock-off on FPGA technology was an over-complexity and the limited availability of experienced designers. Due to technology advancements this is rapidly changing.

To make FPGA technology a friendlier environment, a plethora of programming and implementation options are now available. These new design options are high-level tools that provide powerful, efficient building methods. They have also resulted in a new form factor, the FPGA System on Computer (SoC), also known as a hybrid SoC.

The traditional High-Level Design (HDL) approaches offered by Verilog and Altera (now Intel® Programmable Solutions Group) remain most popular. They are stable and proven. However, they are now joined by OpenCL, which is based on C and C++ and provides an object-oriented development environment for developers needing to turn faster projects without the time to develop a knowledge of the traditional environments.

High-Level Synthesis (HLS)
FPGA development environments can now incorporate low- and high-power microprocessors. They are also able to integrate Intellectual Property (IP) that is built using High-Level Synthesis (HLS) tools based on C/C++ and other object-oriented programming environments like JAVA.

Like OpenCL, HLS tools enable object-oriented design plus the placement of these design segments in the floorplan. FPGA project managers can now choose to create totally new IP or, through their pre-project discovery efforts, identify and purchase tools that provide a good fit from a growing list of third-party sources.

Some IP products enable very high-level object-oriented design techniques, such as drag and drop placement for quickly adding video features. Ready-made IP includes a breadth of tools, including both high and low power microprocessors from Intel® and other manufacturers. The very flexible Intel PSG (Altera) Nios II Soft Processor is available to satisfy the applications required by a real-time SoC. Many more IP solutions are available from Altera and are listed on its website, including the now mature, but ever popular MCU, i.e., Intel MCU 8051.

In addition, Intel is taking a 3D System-in-Package (SIP) approach in recent product launches, e.g., the Altera Stratus 10 MX integrated FPGA that includes 16 GBytes high band-width DDR Memory, four channels 100GbE MAC, and even a Heterogeneous 3D SiP Transceiver. Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) technology can serve extremely high-performance environments. As Figure 1 shows this opens up many possibilities for the future.

Figure 1: Addressing extremely high performance application needs. (Image source: Intel’s Programmable Systems Group)

IP Tools for Object Oriented Development (Partial List)

  • OpenCL
  • Handel-C
  • Impulse C
  • Catapult C
  • JHDL (JAVA-based)
  • System C
  • MYHDL (Python-based)

Gaming and Networking Applications
WIN Enterprises was quick to realize the value of enhancing our own embedded and networking solutions (later, we also targeted IoT) using FPGA co-processors for enhanced data stream throughput. On-board BGA FPGA ICs are combined with other micro-architecture on Single Board Computers (SBCs) and inside of networking platforms for efficient gaming, networking, robotics, and IoT.

In networking applications FPGAs are used for data-stream acceleration that may be used for online transaction processing (OLTP) or other time-sensitive applications.

In WIN’s gaming SBCs the FPGA chips are soldered to the boards and perform the following two major tasks:

I/O Expansion and Real-Time Control
Gaming machines typically use Microsoft Windows or Linux as their operating system, neither of which is a real-time OS. Display is a game’s highest priority in order to deliver the best user experience possible. This means the CPU is often not able to handle the demands of its I/O sources, such as push-button switches, lamps, coin-ins, coin hoppers, LED’s, etc., and do this in real time. The FPGA IC features a dedicated smart intelligence I/O handler able to off-load these tasks from the CPU.

FPGA co-processing is even more important in today’s multiplayer games because of the increased number of I/Os all connected to a single CPU. FPGA’s ability to deliver massively parallel processing handles this challenge.

Today’s gaming machines are designed to be attention grabbers. They feature a multitude of LED lights around their cabinet to attract players. They display in different modes, such as Attract mode, Winning mode, Jackpot mode, etc. These FPGAs are designed with serial output interfaces that drive this large number of LEDs while showing the most appropriate scenes as they receive commands from the game’s software.

NVRAM Management
Casino gaming regulations require strict security. Machines must handle all gaming and financial data such as Credit, Wins, Losses, Payouts, Jackpots, etc.

Games are normally designed to make two or three copies of this sensitive data. This, in turn, can negatively influence the gaming experience. FPGA, as a hardware solution with parallel processing, provides robust throughput to handle this incremental task without experiencing degradation of the display experience.

Figure 2: For a fast and efficient IoT system, FPGA processors can assist production edge  gateways. This enables data from the sensors and actuators to be processed in parallel for virtual real-time reaction to events. (Image source: WIN Enterprises)

The Industrial Internet of Things (IIoT) builds on traditional control engineering and the Information Technology (IT) previously in place in manufacturing organizations. As implemented in manufacturing organizations, IoT can be thought of as a technology stack with integrated layers that increase in intelligence over four or so layers.

At the base-level of the industrial IoT system are sensors, devices, and actuators that interface with the production machinery on the factory floor (Figure 2). The sensors, devices, and actuators monitor and react to the various production events.

Generally, analog data is generated. This data is fed to a production-line (i.e., edge) gateway located between the manufacturing line and a more powerful gateway deployed at the network’s upper edge. This gateway, in turn, communicates with a cloud server. The initial IoT gateway is where we offer an FPGA-augmented system.

The WIN IoT-380 Gateway is an entry-level embedded IoT compute solution. It records and monitors the online components on the manufacturing line and streams data from sensors and actuators via wired or wireless links to more high-level servers at the network’s edge for doing analytics and data aggregation (Figure 3). These higher-level gateways transfer data directly to the cloud for additional processing, longer term analytical reporting, and archiving.

Figure 3: IoT-380 Gateway with Intel® Atom™ Processor E3800 SoC. (Image source: WIN Enterprises)

The production-line gateway translates analog data to a digital format and then refines the information for reporting. It can issue human and M2M alerts when required and store appropriate volatile data. Processing at this level is sometimes referred to as fog computing, as it occurs before the network’s edge.

FPGA solutions ease the task of dealing with several protocols in the manufacturing environment. For instance, machine-to-machine communications can occur between physical or wireless links. Other typical operations are self-monitoring the health of machines for predictive maintenance, detecting machine failure, monitoring logistics, and ordering parts. These gateways can also facilitate the processing and disposition of faulty production output. Protocol translation from analog to digital and the ability to integrate RFID information with other data is considered essential for the production-line gateway. Data translations can be done in parallel by the FPGA chip. The parallel processing of the FPGA-assisted gateway helps maintain overall system efficiency. Another of today’s trending application areas for FPGA-assisted processing is robotics.

When we think of robotics, we naturally think of industrial applications where they are already deployed to the tune of around 1.4 million machines, but today they are used widely. With advances in AI, convolutional neural network engines (CNN) and precision multi-axis control, they are poised to profoundly affect the way we live. Robotics provides a natural home for massively parallel processing techniques like FPGA and hybrid systems for applications like real-time detection for automotive, mobile robotics, industrial production, etc.

Here are some of the top robotics markets that should see robust growth over the next decade:

  • Medical (patient care, advanced prosthetics, etc.)
  • Agriculture
  • Food preparation
  • Industrial / factory floor
  • Education (language training, etc.)
  • Military
  • In home assistance

Stable and Comprehensive
First and foremost, future development will follow the needs of the major trending markets that include high-performance networking, IoT, robotics and automotive. The autonomous automotive market with its need for near real time response to maintain lane integrity, safe vehicle distance, automatic parking and self-driving, is expected to provide a robust market for FPGA solutions. Current research and development on fiber-based, chip-level connectivity can be expected to come online in the near to moderate term, and as new manufacturing techniques drive down the cost of custom solutions, expect to see the integration of analog, ASICs, and CPUs with FPGA.

The acquisition of Altera by Intel and subsequent launch of products that combine Intel® Xeon® and Altera FPGA technology is another major step in providing stable, comprehensive environments for designing, testing, and implementing FPGA solutions within an integrated environment. This environment has the further advantage of being supported by Intel’s IoT Alliance Program.

Intel’s goal is to provide developers with a complete suite of tools for every stage of the design and testing process. Figure 4 shows Intel is well on its way to providing an easy to use, comprehensive environment for the creation of FPGA and FPGA hybrid systems.

Figure 4: (Image source: Intel)

Suffer? No
Articles like this often mention Moore’s Law in their conclusion, but we all agree transistor growth on a per chip basis is slowing. That doesn’t mean, however, that improvements to the computing experience will suffer. In the short term (i.e., before quantum computers, etc.) co-processing architectures using FPGAs and standard processors from Intel and other manufacturers will provide us with the high data stream performance that we require for Cloud and other application areas.

With over 30 years of experience in the electronics industry, Chiman Patel is the founder, CEO, and CTO of WIN Enterprises. Patel holds two patents and is also a charter member of TiE-Boston, a nonprofit Massachusetts organization with a mission to foster and support entrepreneurship.

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