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Organizations: FSA
Overview
Mixel has a full portfolio of highly programmable SerDes IP’s that cover a wide range of data rates and standards. The SerDes IP’s has been verified in silicon in many feature
sizes and foundries. Mixel has extensive characterization data that show outstanding
performance.
MXL-SRDS-4254
The MXL-SRDS-4254 is a CML SerDes that operates from 1.0 to 4.25 Gbps. It is highly
programmable while dissipating low power. Some of the programmable features are: TX
pre-emphasis, RX post-equalization, On-chip RX and TX termination (50, 60, 75 Ohm),
Voltage swing at high speed serial outputs (175 to 800 mVpp), and Data-rate to Reference
Clock frequency ratio (4, 5, 8,10, 16, 20). It is targeted to meet the PHY requirements
for many applications such as Network-backplanes, SONET-OIF, DVI, Gigabit Ethernet,
PCI-Express, SATA.
The MX-SRDS-4254 incorporates Rx post-equalization that enables lower BER & longer
distance transmission.
1.25 Gbps/channel LVDS SerDes: MXL-LVDS-SR-4CH & MXL-LVDS-SR-4CH
The MXL-LVDS-SR Serializer and its companion MXL-LVDS-DS De-serializer are LVDS SerDes
that support 4 data-Channels and 1 clock-channel and operate up to 1.25 Gbps/channel (5.0
Gbps data throughput). The Clock frequency range is 25-180 MHz. Each IP incorporates its
own PLL which require no external components. They support 7/10 bit programmable parallel
data transmitted per pixel clock per channel. The LVDS interface is compatible with
TIA/EIA-644 LVDS Standard. The IPs have been implemented in a modular fashion so any
number of data-channels can be bundled with each clock-channel.
INDUSTRIES SERVED
Consumer Products, Industrial, Entertainment, Networking, Telecommunications |
