Low-Power Systems Design: Products and techniques to optimize the efficiency of low power electronic designs

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Blogs

JB’s Circuit
Lower-Power Java Platforms
Movement from desktop to mobile changes the technical development and the business equation for the development...
Wizards of Electromagnetism
SATA Connector Model in High Speed Digital Design
Due to the faster data transfer rate required in today’s consumer electronics market, interconnect...
Domeika’s Dilemma
Multicore – assimilating the new developments
There was a brief pause in my blogging as I have been assimilating some of the new developments in the...
Koby's Kaos
“You Can’t Get There from Here”
There’s Intellectual Property, and then there’s intellectual property. When I was growing up in the...

Featured White Papers

Power Consumption at 40 and 45 nm
At 40 and 45 nm process nodes, power has become the primary factor for FPGA selection.
Minimizing Energy Usage in Battery-Powered Microcontroller Systems
Today’s portable products have conflicting requirements on the batteries that power them. More features increases energy requirements, while end users demand longer battery life, so, energy efficiency is paramount. The traditional approach to minimizing energy consumption has been to minimize current drain; however, the energy capacity of a battery is dependent upon voltage, current and time. Microcontroller-based systems powered by user-replaceable batteries can benefit from an MCU that is specifically designed to address each of these variables to achieve meaningful improvements in overall energy efficiency.
The PSP Model in RF CMOS Design
This white paper explains the technology behind Penn State Philips (PSP) transistor models and how they relate to actual device behavior.

EE Catalog Tech Videos

It's Not Just Windmills and Photovoltaics, but Wires, Too
Cisco's Internet Business Solutions Group Discusses How to Make the Grid Smart.
IBM POWER7 processor chip animation
The engine beneath the hood of the new IBM POWER7 systems, this processor chip has eight cores with four threads per core for a total of 32 threads per chip! Use of IBM's embedded DRAM technology enabled 32 megabytes of L3 cache memory giving the chip massive bandwidth and the system exceptional power efficiency.
Efficiency Without Compromise
With energy consumption and costs rising, energy efficiency has become a major concern for data center operators and managers, but energy represents only a slice of data center lifecycle costs. The challenge is to lower costs while maintaining or improving availability. Emerson Network Power is helping organizations meet this challenge through Efficiency Without Compromise, which provides a flexible path for optimizing data center infrastructure design, operating and management efficiencies, all with an eye toward availability.
Challenges At 32nm And Beyond
Wally Rhines, chairman and CEO of Mentor Graphics, talks about what’s changing in design, the effect of low power, and who’s going to be doing the most advanced designs.
Tesla: The Ultimate Low-Power Design
When your battery pack alone costs $30,000 and you get 200 miles per charge, you’ve got to be looking for ways to save power. The Tesla roadster is crammed with parts from many Silicon Valley companies, all designed to draw as little power as possible. But there’s still much more work to be done.
Saving Power By The Milliwatt
Power budgets may look small, but the amount of power that can be saved with different design approaches will surprise you.
Part 1 of an Interview with one of the Architects of MontaVista Linux 6, Joe Green
This is an interview with one of the architects of MontaVista Linux 6, Joe Green. Joe talks about our approach with MVL6, and the use of BitBake in the new MontaVista Integration Platform.

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JB’s Circuit

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