Benefits

• Delivers 800MHz to 1.4GHz performance for embedded I/O processor designs
• 32K-I/32K-D L1 caches
• 512KB L2 cache, may also be used as on-chip SRAM
• 32KB on-chip SRAM
• High-speed Processor Local Bus (PLB) with 2-way crossbar, supports 12.8 GB/sec. peak bandwidth
• 2nd High Bandwidth (HB) bus with 6.4GB/s bandwidth, accelerates RAID transactions
• Three Gen 2 PCI Express interfaces
• 32/64-bit SDRAM memory controller, interfaced to all three PLB slave segments, supporting memory speeds up to DDR2-800
• On-chip RAID 5 and RAID 6 acceleration (optional)
• On-chip storage and network encryption engines (optional)
• Three-channel DMA engine
• Integrated I2O messaging
• On-chip peripherals including four 10/100/1000 Ethernet MAC, UARTs, IIC
• Offers low power dissipation and small form factor for highdensity and power-conscious applications

With speeds of up to 1.4GHz, the PowerPC 460SX embedded processor offers a powerful mix of high bandwidth, design flexibility and robust features. With three PCI Express interfaces, an on-chip DDR2 SDRAM controller, I2O messaging unit, RAID 5 and RAID 6 acceleration hardware, storage and network encryption engines, and a rich peripheral mix, the PowerPC 460SX embedded processor is ideally suited for RAID controllers, Storage Area Networking (SAN) equipment, iSCSI, NAS, and other embedded storage and networking applications.

The PowerPC 464 Core

The 464 core is an enhanced version of the 440 core. To enhance overall throughput, , the PowerPC 464 superscalar core incorporates a 7-stage pipeline and executes up to two instructions per cycle. Its large 32KB data cache and 32KB instruction cache are 64-way setassociative. For additional system performance, the PowerPC 464 core includes dynamic branch prediction and 24 digital signal processing (DSP) instructions, as well as non-blocking caches that can be managed in either write-through or write-back mode.

High-Bandwidth Bus Architecture

For high bandwidth transactions, the PowerPC 460SX uses two independent buses. The primary bus is a coreConnect 128-bit processor local bus (PLB), with a two-way crossbar configuration. It provides separate 128-bit read and 128-bit write data buses for each or the two ways. The four 128-bit data buses may operate concurrently, providing up to 12.8 GB/s of peak on-chip bandwidth. The secondary bus is a 128-bit bus with separate 128-bit read and 128-bit write data buses. These two 128-bit data buses may also operate concurrently, providing additional up to 6.4 GB/s of peak bandwidth. The aggregate on-chip bus bandwidth is 19.2 GB/s. The SDRAM is attached to three PLB slave ways to provide optimal access to memory from any other peripheral/core. Lower bandwidth I/O devices are supported by the on-chip peripheral bus (OPB).

High-Bandwidth Bus Architecture

For high bandwidth transactions, the PowerPC 460SX uses two independent buses. The primary bus is a coreConnect 128-bit processor local bus (PLB), with a two-way crossbar configuration. It provides separate 128-bit read and 128-bit write data buses for each or the two ways. The four 128-bit data buses may operate concurrently, providing up to 12.8 GB/s of peak on-chip bandwidth. The secondary bus is a 128-bit bus with separate 128-bit read and 128-bit write data buses. These two 128-bit data buses may also operate concurrently, providing additional up to 6.4 GB/s of peak bandwidth. The aggregate on-chip bus bandwidth is 19.2 GB/s. The SDRAM is attached to three PLB slave ways to provide optimal access to memory from any other peripheral/core. Lower bandwidth I/O devices are supported by the on-chip peripheral bus (OPB).

High Performance Memory Support

The 460SX incorporates a high-performance DDR memory controller supporting DDR2 memory devices. The memory interface can operate at an effective rate of DDR800, for a maximum bandwidth of 6.4 GB/s. The interface can be configured for 64-bit or 32-bit memory implementations. Optional ECC. Industry standard DIMMS and discrete devices are supported for up to 16 GB of memory. For greater efficiency, the memory controller provides parallel paths from each of the three PLB slave segments and memory.

On-chip Memory

The PowerPC 460SX offers 32 KB of on-chip memory. It can be used to store boot code, security keys, or other user-specific functions.

Gen 2 PCI Express Interfaces

The 460SX offers three independent PCI Express interfaces compliant with PCI Express base specification 2.0 (5 GB/s per lane). The primary interface has eight lanes and supports x8, x4, or x1 configurations. The secondary two interfaces have 4 lanes each and can be configured as x4 or x1 ports, or be combined as a second 8-lane PCI-E port. All three interfaces can be configured as either root or end point ports.

RAID Hardware (optional) and I2O Accelerate Storage Applications

The 460SX offers on-chip acceleration hardware for RAID 5 and RAID 6 parity generation and checking. This hardware, along with an internal high efficiency threechannel DMA engine, implements XOR and Galois Field P and Q parity operations in parallel at a high throughput rate. I/O processing and other applications using multiple processors can benefit from the integrated messaging unit. Using I2O message frames, this messaging unit improves system performance by enabling the 460SX to communicate with a host system on the host-side PCI Express bus. This enables the 460SX to operate as an intelligent I/O adapter controller.

Ethernet Ports, TCP/IP Acceleration, and QoS

For network connectivity options, the 460SX offers two integrated 10/100/1000 Ethernet ports with TCP/IP Acceleration Assist, QoS, and Jumbo Frame support. Two additional 10/100/1000 Ethernet ports are also provided, for a total of four. All four are configurable as RGMII and RBTI or optionally as two GMII interfaces.

Storage Security Engine (optional)

For storage applications the 460SX offers on-chip high speed hardware acceleration engine for IEEE1619 encryption/decryption for data at rest. It supports Galois counter mode and XTS-AES and LRW-AES. It also supports hashing for SHA-1 and SHA-2 (SHA-224, SHA- 256, SHA-384, SHA-512) and Hash Message Authentication (HMAC).

Network Turbo Security (Optional)

The PPC460SX delivers advanced security capabilities with the optional Turbo Security Engine. This security engine attaches directly to the PLB bus for the fastest possible throughput between the PPC464 processor, memory, and the security engine itself. The Turbo Security engine supports DES, 3DES, AES, ARC-4 encryption, MD-5, SHA-1 and SHA-2 (SHA-256, SHA-384, SHA-512) hashing. The security engine includes a pseudo random number generator as well as header and trailer protocol processor. The engine also incorporates an on-chip true random number generator and a public key accelerator. The algorithms are compliant with FIPS-140-2 and ANSI X9.17 Annex C.

External Bus Interface

To accommodate connectivity with other devices, the PowerPC 460SX offers a 32-bit bus supporting up to four ROM, EPROM, SRAM, flash memory or slave peripheral I/O devices and speeds up to 100 MHz. The 4-Channel DMA is also supported.

Standard Peripherals

Two IIC controllers operate at 100/400 KHz. Both support master mode with multi-master and reset and target mode, and one supports serial boot ROM. The peripheral set also includes two UARTs, up to 32 general-purpose I/Os (GPIO) and general-purpose timers.

PowerPC Partners Ecosystem

AMCC’s embedded PowerPC processors are supported by an extensive ecosystem of products and services from a wide range of leading suppliers. AMCC’s PowerPC Partners program includes industry-standard providers of:

• Embedded operating systems

• Hardware and software development tools

• Embedded software products and services

• Board-level products

• System design services

• Technical training

For full details of the products and services available through the PowerPC Partners program, or to browse support available for a specific processor, visit http://www.amcc.com/Embedded/Partners. AMCC also provides an evaluation kit for this PowerPC processor, including an optimized evaluation board as well as sample applications and other software.

Features

• CPU Speed (frequency): 800MHz to 1.4GHz

• Performance: 2.0 DMIPS/MHz (2800 DMIPS @ 1.4GHz peak)

• 32 KB -I/32 KB D L1 caches, and 512 KB L2/SRAM with parity protection

• 32/64-bit DDR II SDRAM Controller, for up to DDR800 operation

• Three Gen 2 PCI Express interfaces, one with eight lanes configurable as x8, x4,x1 and two with four lanes configurable as two x4, or x1, or they can be combined as a second 8-lane PCI-E; compliant with PCI Express base specification 2.0; 5.0 Gb/s full duplex per lane; all ports configurable as root or end point

• RAID 5 and RAID 6 acceleration hardware for P & Q parity generation and check functions

• Intelligent Messaging Unit (I2O specification)

• Three-channel high bandwidth DMA engine

• External bus control (EBC) Interface (up to 100 MHz) with 29-bit address bus, 32-bit data bus supporting up to four ROM, RAM, EPROM, flash memory, or peripheral devices.

• Storage Security Engine (Optional) – Galois counter mode and XTS-AES, LRW-AES. SHA-1 and SHA-2 (SHA- 224, SHA-256, SHA-384, SHA-512) hashing – Hash Message Authentication (HMAC).

• Network Turbo Security Engine with IPSec/SSL hardware acceleration (Optional) – DES, 3DES, AES, ARC-4 encryption, MD-5, SHA-1 and SHA-2 (SHA- 256, SHA-384, SHA-512) hashing. – True random number generator and a public key accelerator.

• NAND Flash controller, which supports one to four banks of NAND Flash memory devices; direct interfacing to discrete NAND Flash devices (up to four devices) and Smart-Media Card socket (22-pins); 4 MB to 256 MB device sizes supported; boot-from-NAND supported

• 4-channel DMA -available for internal use and 2 channels for external use; scatter/gather capability

• (4) Ethernet 10/100/1000-Mbit/s full duplex MACs, with Quality of Service (QoS) support – IPv4 and IPv6 Internet protocols – Jumbo Frames – Four ports RGMII, RTBI, or optional two ports GMII interfaces – CRC32 error detection and checking – TCP/IP and iSCSI Acceleration Hardware support – DMA capability by means of memory access layer (MAL)

• Two serial ports (16750-compliant UARTs) with 64-byte FIFOs

• Two IIC controllers

• Up to 32 General Purpose I/Os (GPIO)

• General purpose timers

• Universal Programmable Interrupt Controller supports 16 external interrupt sources and 101 internal sources

• Support for JTAG board testing, JTAG debuggers, and 4XX instruction trace

For more information on the product features, visit our Web site at: http://www.amcc.com

For technical support, please call 1-800-840-6055 or 858-535-6517, or email support@amcc.com. AMCC reserves the right to make changes to its products, or to discontinue any product or service without notice and warrants its products solely pursuant to its terms and conditions of sale, only to substantially comply with the latest available datasheet. Please consult AMCC’s Terms and Conditions of Sale for its warranties and other terms, conditions, and limitations. AMCC may discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing any orders, that the information is current. AMCC does not assume any liability arising out of the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. AMCC reserves the right to ship devices of higher grade in place of those of lower grade. AMCC SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. AMCC is a registered trademark of Applied Micro Circuits Corporation. PowerPC and the PowerPC logo are registered trademarks of IBM corporation. All other trademarks are the property of their respective holders. Copyright © 2008 Applied Micro Circuits Corporation. All Rights Reserved. POWERPC460SX_PB_v1.01_052008