Mentor Graphics First to Provide Co-Verification Support for MIPS32 34K Multi-Threading Processor Cores

WILSONVILLE, Ore., March 12, 2007 – Mentor Graphics® Corporation (Nasdaq:
MENT) today announced a new processor support package (PSP) for the MIPS32® 34K™
family of processor cores. Developed jointly with MIPS Technologies, this new C-based PSP
supports transaction-level (TLM) and register-transfer level (RTL) simulation to give
engineers a consistent platform upon which to view, validate and co-verify the
multi-threaded hardware/software interactions occurring on the 34K processors.

Processing multiple software threads in parallel, the MIPS32 34K cores deliver
significant gains in system performance and cost savings, with a very modest increase in
die size. However, taking full advantage of these capabilities requires a powerful
verification approach that allows designers to see parallel operations simultaneously.

“In multi-threaded processing, the hardware/software interactions of the system become
intensely complex. Mentor Graphics’ processor support package gives our customers insight
into high-level activity across multiple threads, as well as detailed activity on any
single thread,” said Jack Browne, vice president of marketing at MIPS. “The result is a
design flow that makes it easier for our customers to maximize the performance potential
of applications based on our 34K processor family.”

The cycle-accurate PSP for MIPS32 34K processors is designed to work with the Mentor
Graphics Seamless® co-verification tool, the first co-verification tool to support the
34K core family. The Mentor Graphics solution supports detailed views of the design, down
to registers, system busses, and memory activity. The new Seamless PSP also supports
comprehensive views of a 34K core’s virtual processing elements (VPEs) and thread contexts
(TCs) to simplify verification and debug of software execution in a multi-threading system
which can even include multiple operating systems running on a single 34K core. These
capabilities enable engineers to optimize system performance and resolve hardware/software
integration problems early in the design cycle, avoiding late-stage silicon re-spins that
can cost millions of dollars.

“Mentor Graphics teams with industry-leading CPU vendors like MIPS Technologies to help
our mutual customers maximize the value of their processor investments,” said Serge Leef,
general manager of the System-Level Engineering Division at Mentor Graphics. “With this
Mentor/MIPS combination, hardware engineers get a consistent, efficient system validation
and co-verification platform that they can leverage throughout their electronic system
level (ESL) and traditional RTL design processes.”


The Seamless PSP for the MIPS32 34K family is currently available from Mentor Graphics. For technical and pricing information, please email To find additional product information and technical papers, register for free Seamless workshops and functional verification seminars, please visit

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $800 million and employs approximately 4,250 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site:

Contact Information

Mentor Graphics – Veloce Emulation Platform

8005 SW Boeckman Rd.
Wilsonville, OR, 97070

tele: 1-503-685-8000
toll-free: 1-800-547-3000

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