As the semiconductor industry’s trusted IP partner, Virage Logic is the preferred supplier of semiconductor IP solutions to the global semiconductor industry providing a broad portfolio of silicon proven physical IP products targeted at the world’s leading foundry processes from 250- to 45nm and application specific IP for DDR memory interface solutions.

Virage Logic’s Silicon Aware IP™ offering (embedded memories, logic libraries and I/Os) includes silicon behavior knowledge for increased predictability and manufacturability. The company’s latest product offering of Application Specific IP (ASIP) solutions includes Double Data Rate (DDR) Memory Controllers and design services.

Physical IP Solutions

SiWare™ Memory

Power-Optimized Memories for Advanced Processes at 65nm and 45nm

SiWare™ Logic

Yield-Optimized Standard Cells for a Wide Variety of Design Applications at 65nm and 45nm

ASAP™ Memory

Self-Test Enabled High-Density, High-Speed and Ultra-Low-Power Memories

ASAP™ Logic

Metal Programmable, Standard Cell, Ultra-Low-Power and ECO Libraries

STAR™ Memory

Embedded Memories Designed for Testability and Manufacturability to Optimize Yield

STAR™ Memory System

Self-Test and Repairable Memories

STAR™ Yield Accelerator

Reduces Silicon Time-to-Test, Time-to-Product Bring-Up, Time-to-Volume Production

NOVeA®

NVM on a Standard CMOS Process

IPrima® Foundation

Optimized Platforms for Specific Technology Nodes and Foundry Processes

Foundry Pays IP

Silicon Proven Foundry Pays Free IP – in Partnership with Leading Foundries Worldwide

Base I/O Libraries

Rich Set of I/O Cells

Application Specific IP Solutions

Intelli™ DDR

High Performance and Low Latency Memory Controllers for DDR1/DDR2/DDR3 Based Systems Low Power, High Bandwidth Memory Controllers for MobileSDR and Mobile DDR Based Systems

Intelli™ PHY+DLL

Physical Layer Interface + DLL Hard Macro Solution for DDR1/DDR2/ DDR3 Based Systems

Intelli™ PHY

Physical Layer Interface Companion for Intelli DDR Products

Intelli™ DLL

High Precision, Small Footprint, Digital Delay Locked Loop

Intelli™ Models

Vendor Independent Simulation Models for DDR Memories

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