News, Analysis & Features
New White Papers
08/11/16 Add an element of “gaming” to a point-of-sale, digital sign, vending machine or traditional...0
08/10/16 And why the requirements of mobile and smart energy aren’t so far apart as you may think. Smart...0
08/09/16 Embedded systems can leverage the products being driven by data center applications, using...0
08/09/16 No need to flip out over flippability: You have the means to adjust your designs to USB Type-C...0
08/03/16 Wearable device design relies on DSPs to provide always-on performance that is compatible with the battery-powered demands of this emerging market.0
07/18/16 Chris A. Ciufo, Editor, Embedded Systems Engineering In this Part 2 of 2, I examine the subject of using the flash manufacturer’s secure erase feature—since so many DoD documen...0
07/14/16 Embedded system designers have new cyber security weapons for information assurance, anti-tamper...0
07/07/16 Multicore architectures arrival on the scene poses new challenges for application designers. The...0
First Heterogeneous System Architecture 2016 Global Summit Kicked Off Today in Beijing, China 08/22/16
HSA Foundation, AMD Spearheading HSA Technologies Tutorial at 25th International Conference on Parallel Architectures and Compilation Techniques 08/13/16
LDRA Leads Embedded Safety and Security Summit (ESSS) to Provide Valuable Networking, Education, and Standards Development Platform 07/27/16
Silicon Deployment of Sensory’s Low Power Sound Detector for Always-Listening Voice Control Heats Up 07/22/16
Microsemi's Ted Speers Joins Inaugural RISC-V Foundation Board of Directors to Support Company's IoT Growth Using New Emerging ISA Standard 07/14/16
Chris A. Ciufo, Editor, Embedded Systems Engineering In this Part 2 of 2, I examine the subject of using...
By Alan Grau, Icon Labs On a daily basis, I have the opportunity to interact with a wide range of companies...
#NEWS Diamond Microchips Going Commercial Starting with 100 GHz Processors that Run Cool / (NextGenLog)
After a decade of development diamond semiconductors may be ready for prime time. Even at the 100 nanometer node, they are 10X faster than silicon, enabling Moores Law to reset a decade, and processor speeds to be ramped up to the terahertz range, rather than be stuck at 5-GHz resulting in hard-to-program multi-core substitutes...
As we develop electronics in early 2014, the battle between processor architectures is raging in all spaces, from deeply embedded through mobile to servers. Choosing the right ecosystem partners is crucially important, and today's announcement of an extended partnership between ARM and Cadence marks important steps...
Blog Post: How to integrate position encoder master protocols into Sitara™ processor applications / (TI E2E Community)
If you have been following my multiprotocol Industrial Ethernet blog series , you already know that I am a big fan of the programmable real-time unit and industrial communication subsystem (PRU-ICSS), a programmable peripheral inside Sitara™ processors. In this post, I want to talk about another application where PRU-ICSS...
At Hot Chips this week, Nvidia announced details of its next-gen Tegra processor, known as "Parker," while others argued that digital signal processors can do the job better. All of them are vying to power emerging applications such as self-driving cars, drones, VR and augmented reality, and smart cameras....
Recommended Technology Papers
Architectural exploration is at the heart of any ASIP design approach. This white paper explains the architectural tradeoffs available to an ASIP designer, such as performance vs. area, and why an ASIP design can still maintain full C-programmability while being optimized for a certain application domain.
Introducing a networking protocol DDS. Serving as the connectivity platform for real-world Industrial Internet of Things applications in medicine, transportation, energy, SCADA and
Performance of multicore SoCs is often dominated by external DRAM access, particularly in digital consumer devices running high quality video and graphics applications. Increasing core counts and newer DRAMs make the problems much more difficult. This article covers optimization of the on-chip network and memory system to achieve the required system throughput.
Using virtualization to host multiple discrete workloads on a single computing device is an important trend in manufacturing today, leading to reduced cost and complexity in the factory environment. This white paper describes the benefits of system consolidation along with the technical requirements for implementation. Read now to learn more.
EECatalog on Facebook
Find Solutions for Your Project
Supported Architectures: 16-bit, 32-bit, ARM, OMAP, Power Architecture™ (including PowerPC), Other Compatible Operating Systems: Microsoft Windows® Control of a multicore system