Designers wrestle with the dual needs of boosting performance
for larger data sets while lowering the power budget.

The classic tradeoffs of area, performance and power are tilted heavily in favor of power.

The ability to add more multimedia functionality onto SoCs as chipmakers push to new process nodes also has created the need to make these chips much more sophisticated. Static leakage and basically flat power supplies—battery capacity isn’t growing significantly, and there is actually a push to reduce the size of batteries—have created some interesting engineering tricks such as adding in multiple power domains and a number of sleep states that are making chips incredibly complicated to design and verify.

From the consumer standpoint, all of this means more functions on a single device and often better performance of those functions, not to mention a lighter and more versatile package. The original cell phones that were introduced in the 1980s looked more like World War II walkie-talkies than the sleek smart phones we use today, and batteries lasted minutes rather than hours. Now it’s possible to open several windows at once while talking on a phone and perform those functions without significant power drain.

“Rich browsing experiences are at the heart of this shift in multimedia access, as specialized devices should have the ability to access online content and participate in social networks on the Internet,” said David Wurster, senior product manager for the Windows Embedded Business at Microsoft. “To meet this requirement for multimedia accessibility, OEMs will need a platform that enables endless possibilities by providing compelling, immersive and connected user experiences, as well as “anytime, anywhere” capabilities. As part of these connect experiences, OEMs will have to leverage touch, panning, zoom and other advanced capabilities, while also pushing beyond to ensure their devices are able to provide seamless connectivity with Windows PCs, servers and online services – all with the familiarity to securely access infrastructures at work, as well as personal photos, videos and documents at home.”

The same design constraints that make these experiences possible are affecting other markets, as well. Government regulation, the overarching green movement and growing awareness inside of corporations about the amount of money spent on electricity have pushed many of these techniques into markets where there was little concern in the past. The addition of video and full document imaging into corporate storage has dramatically increased the amount of processing power and storage necessary to deal with these data forms.

The good news is that much of the engineering work that is occurring at the portable device level is spilling over into the plug-in devices. This is incredibly complicated stuff, particularly in the verification stage of chip production, but there is plenty of work that has been done and more under way.

“We are continuing to divide the SoC into power and voltage islands,” said Robert Tolbert, OMAP platform marketing manager at Texas Instruments. “You switch these on and off as you need them and remove the voltage and clocks when they’re not. We also are working with dynamic leakage management for memory when it’s in a retention state.”

One solution to all of this is to add more processor cores into handheld devices, but not the general-purpose kind of processors. These typically are cores that are sized appropriately for the task, with software matched to the core to take advantage of what’s needed. “You don’t just stumble on low-power techniques,” said Tolbert. “It takes many years of trial and error to be good at it. And power goes hand-in-hand with performance. You push the power and performance envelope together.”

He noted that one of the keys to being successful at this marriage is reusability of some of the hardware, or at least the IP, the software and the techniques used to manage the power. “You have to take advantage of more real estate without raising the price, and that’s not just something you do in one generation.

Multimedia Everywhere

What’s happening at 45nm and beyond looks like a silicon version of the Oklahoma Land Grab. The amount of real estate available by shrinking the distance between wires has opened up enormous possibilities for expansion of functionality on a single die.

Cameron Swen, divisional marketing manager for AMD’s embedded client group, said the next big wave is 3D graphics, and not just in expensive televisions or movie theaters. He said it’s now showing up in the self check-out at grocery stores.

What makes 3D imaging so attractive these days is that it’s a natural fit for multicore chips. The stereoscopic images can logically be parsed across two or more processor cores. And because single-core processors implementations have run out of steam for many of the most advanced processors—it’s impossible to continue turning up the clock speed without melting the chip—companies like AMD, Intel and IBM have opted for multicore designs.

The problem there, however, is that most software was never written to take advantage of multicore. While some of it has been threaded into a couple cores, beyond that processor makers have either used acceleration technology on additional cores or they have encouraged virtualization for many mainstream applications. 3D presents a new opportunity to utilize more cores, and it’s starting to catch on. Swen said Casino gaming already is leveraging 3D graphics, and more are on the way.

One new application is facial detection in digital signs. If someone standing in line at a checkout counter looks at the device, the sign can respond. Adding more intelligence into signs, in general, also allows them to be controlled locally instead of centrally. That allows it to be more responsive to local needs than a generic response across all markets. But while all of this is happening, there is a simultaneous need to decrease the power draw, so not all of the processing is done on an x86 processor core.

“If you have a financial application and you need to do calculations for options, doing the calculation on an x86 isn’t as efficient as sending it to a graphics processor,” Swen said. “If it makes more sense to do processing on a GPU than a CPU, you do it there. In teleconferencing, you’re taking in video, compressing it and decompressing it on the other end. You may not need to do that in a CPU.”

Power Up, Power Down

While power is an overriding concern in all multimedia applications these days, performance is also essential.

Texas Instruments currently is using more than a dozen power domains in its 45nm platforms. What’s particularly interesting, though, is where TI is looking to use those chips—everything from e-books to automobiles and government/commercial installations. “A low-cost, highperformance solution lends itself to many devices, even those that are powered from the wall,” he said. “We’re seeing request from all sorts of multimedia devices including video surveillance and the medical field."

Likewise, AMD is looking at adding more instructions per clock cycle while being able to put some cores into a deep sleep state and awaken them within one or two clock cycles. “What customers are asking for is maximum performance at zero watts. Our approach is increasingly to get performance from both the GPU and the processor and balance the two of them.”

In the end, the market for these kinds of chips is almost limitless. Microsoft sees huge opportunities for what it calls “rich user experiences and seamless connections.”

“We are continuing to see a shift among end users, both in the consumer and enterprise realms, toward enhanced user experiences and anytime, anywhere availability of browsing capabilities, access to social media applications and other stored media content,” said the David Wurster. “Today, the proliferation of specialized devices, such as connected TVs, eBook readers, portable media players, in-car infotainment systems, ATMs, Point of Service (POS) solutions and kiosks, to name a few, continues to underscore the need for increased connectivity between these devices, PCs and online services – all with the consistent experience users expect.”

And all of this has to happen within a very tight power budget.

Ed Sperling is Consulting Editor for Chip Design magazine. He is the Editor-in-Chief of the “System Level Design” portal. Ed has received numerous awards for journalistic excellence.