PCIe Follows USB 3.0 to Mobile Applications
PCIe is following USB into mobile chip-to-chip applications by adopting the low-power MIPI M-PHY.
USB 3.0 followed PCIe into the gigabit/second realm by adapting the PCIe Gen2 PHY. Now PCIe is following USB into mobile chip-to-chip applications by adopting the low-power MIPI M-PHY.
PCIe pioneered the use of a serial physical layer in the PC world, and has been extremely successful. It quickly displaced parallel physical layers in both desktops and laptops. However, PCIe has not been used in hand-held devices such as cell phones and tablets. Primarily because of the design of the PCIe PHY, PCIe was judged to require too much power to be used in systems with tiny batteries and long battery life requirements.
USB, on the other hand, has been widely used in hand-held devices. USB provides a charging port, a reasonably fast way to download software during manufacturing, and it provides a low-cost accessory interface. It’s also used as the data transport for HSPA and LTE modems (on PCIe minicards). Economies of scale naturally led to the desire to reuse designs for chip-to-chip applications, connecting the application processor to the modem’s baseband processor.
As with PCIe, the USB physical layer consumed too much power for chip-to-chip use. In 2007, USB-IF published the High-Speed Inter-Chip USB (HSIC USB) specification, which replaced the standard USB 2.0 PHY with a low-power equivalent. HSIC USB is now widely used in 4G smartphones and tablets.
In 2008, USB-IF published the USB 3.0 specification, adding 5 Gbps SuperSpeed support. SuperSpeed USB uses an adapted version of the PCIe PHY – USB and PCIe are so similar that they share a single reference PHY implementation specification, PIPE 3.0. In part because it was based on the solid foundation of the PCIe PHY, USB 3.0 has been technically successful. It’s now a standard feature of PCs and operating systems.
Mobile system architects recognized the benefits of high-speed serial busses, but felt that a low-power version was needed. In 2008, the MIPI Alliance started the development of a low-power, high throughput serial PHY that could be generally deployed to support serial busses inside mobile devices. The goals included 20 mW of power when active, ultra-low power in stand-by, and scalability from low-power low-data rate signaling to multi-gigabit/second throughput. In 2011 the resulting MIPI Alliance Specification for M-PHYSM was released. M-PHY was first adopted by MIPI as an option for its UNIPRO general-purpose interconnect scheme; in this form it was adopted by JEDEC as the physical layer for connecting to advanced flash memory as part of the Universal Flash Storage standard.
Meanwhile, modem makers were looking for a suitable interconnect for next-generation LTE networks. These networks will have air interfaces capable of throughputs beyond the 40 MB/s typically possible with HSIC USB. Further, there was a desire to deploy other SuperSpeed applications such as mass storage in a chip-to-chip environment. The SuperSpeed Inter-Chip USB (SSIC USB) group selected M-PHY as the physical layer, and developed a reference model that bridges from the PIPE 3.0 reference model to the M-PHY physical layer. This allows existing USB 3.0 IP to be quickly adapted for SSIC USB use by deleting (or disabling) the legacy USB 2.0 support, replacing the USB PIPE 3.0 implementation with a shim plus an M-PHY implementation, and making minor changes to the link layer of the USB 3.0 IP.
In September 2012, PCI-SIG and the MIPI Alliance announced an initiative to similarly adapt PCIe to run over M-PHY. Because of the work already done by the USB-IF SSIC USB group, the adaptation will likely include a similar reference model based on PIPE 3.0, simplifying early prototyping and architectural verification.
PCIe over M-PHY is likely to be quickly accepted in the Ultrabook and x86-based tablet PC market because it will allow reuse of hardware and software IP while lowering system power requirements. Adoption may be slower in smartphones and ARM-based tablets, because there’s less experience in using PCIe in those systems.
Terry Moore founded MCCI in 1995 and is the CEO. He has 35 years of experience designing and implementing computer system software and holds six hardware and software patents. He is recognized as one of the leading experts in Universal Serial Bus (USB) technology. His MCCI blog is "Making Connections."