Brick by Brick: Q&A with PCI-SIG President and Chairman Al Yanes and PCI-SIG Board Member Ramin Neshati

PCI Express is a low-cost I/O technology contender that supports a range of applications, from high performance computing to low-power, mobile devices and anything in between—significant for developers in the embedded and IoT era.

EECatalog: What are some recent activities of PCI-SIG that have direct bearing on capturing IoT opportunities?

Ramin Neshati headshotRamin Neshati, Board Member, PCI-SIG:
PCI-SIG is interested in ensuring that its flagship I/O PCI Express (PCIe®) technology is adopted across the breadth of the industry and communications technology (ICT) industry. To increase PCIe support in IoT, embedded and mobile/low-power usage models, PCI-SIG is taking steps to educate its members and the industry at large on the many attractive features of this technology that have direct relevance to these emerging and growing market segments.

For instance, PCIe technology is natively supported by all major operating systems with its robust device discovery and configuration mechanism; a rich set of power management and error reporting features; and dynamic, hardware-autonomous or software-driven link width negotiation procedures to increase/decrease interconnect lanes as the need arises. For I/O expansion beyond the chip-to-chip implementations, PCIe architecture supports a plethora of card, module and cabling solutions across the compute continuum.

EECatalog: Say you are an engineer thinking about the ways to make optics cost-effective: What questions should you ask?

Al Yanes headshotAl Yanes, President, PCI-SIG: While there is no current work group for optics within PCI-SIG, if I were to say something [to your readers] I would say, “Develop cost-effective optics that the industry could potentially use in the future.”  And, right in line with that, any questions posed to the subject matter experts who serve on PCI-SIG technical work groups would center on two concerns.

One, cost. We are very sensitive to cost. PCIe technologies are broadly adopted primarily because low cost is one of our founding principles. Anybody who uses PCI Express technology in their implementations must be able to do it in the least expensive manner possible.

The other concern is power. In addition to considering the cost of implementation and the cost of optics-ready, photonics-ready components, one must consider how much power is being consumed. Whether it be an HPC application, PC platform or low-power mobile device that draws power, computes and communicates, we want it integrate PCI Express technology. Nowadays, users are mobile and want their devices to go with them, which goes hand-in-hand with requirements for long battery life. For that reason, we insist that PCI Express technology be a globally recognized low-cost I/O architecture that can support a breadth of computing devices, from those requiring high performance computing power to low-power mobile applications.

EECatalog: Would it be fair to add security to that list of concerns?

For the range of applications that spans everything from mobile to high performance computing (HPC), the PCI-SIG believes PCI Express can serve as the I/O architecture. Courtesy

For the range of applications that spans everything from mobile to high performance computing (HPC), the PCI-SIG believes PCI Express can serve as the I/O architecture. Courtesy

Ramin Neshati, Board Member, PCI-SIG: Yes, but since security is such an expansive topic let us narrow it down a bit. For instance, we won’t touch on data encryption or authentication/access control in this context. Given that a platform can be envisioned as having a hardware layer, a firmware or virtual management layer, a layer with the software/OS and then applications stacked above that, security mostly comes into play around the middle to  top layer—that is where it is relevant today and that is where most security-related solutions live.

In today’s platform architectures [Security] features don’t emanate from the hardware layer as much, and that is part of the problem (the other part being exposed or unprotected attack vectors). That is one of the reasons why we have growing threats from viruses, phishing and the like, because there is no hardware-autonomous way to detect and neutralize malicious intent and malicious code—whether they originate from sophisticated hackers or from enterprising “Nigerian royalty.”

The wave of the future may be that security should be embedded in the hardware. We may be headed in that direction, a move that the question, “How is PCIe technology going to provide security features or enable a secure I/O interconnect or link?” anticipates. Today, the PCI-SIG is not developing “Secure PCIe” and perhaps there should be a vetting of requirements and careful analysis of potential solutions. The PCI-SIG is responsive to the needs of its members and when such a request picks up steam and the ecosystem pushes for it then the PCI-SIG will surely respond.

In today’s world, though, security is primarily concerned with the aforementioned firmware and software layers. However, having said that, for a structure in which cost is the first brick and power is the second brick, I can easily see that security will be the third brick.

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