Linear Redrivers Make Visible Difference in DisplayPort Connections
Capable of 10 Gbps speeds and beyond, DisplayPort requires linear redrivers to achieve proper signal integrity with link training.
Digital designers understand that at Gigabits per second (Gbps) speeds, they need to pay careful attention to signal integrity. SI issues can’t be ignored with standards like USB 3.0/3.1, HDMI 2.0, PCI Express Gen 2/3 and DisplayPort 1.4. Yet besides following good design practices for signal trace routing, impedance matching, connectors and link discontinuities, designers can also benefit from a little signal integrity (SI) “boost” in their designs.
The favorite “boost” in question is a redriver or retimer. These semiconductor devices are little amplifiers that act as repeaters and more, providing signal gain, waveform shaping, clock recovery and basically making Gbps signals behave as intended over long channels such as DisplayPort. With the Video Electronics Standards Association’s (VESA) DisplayPort in particular (Figure 1), cables in excess of one meter are commonplace between the source video and the destination display and audio output and a “boost” is called for.
Yet only a special type of redriver or retimer—the linear redriver—is suited for use with DisplayPort. This article examines why this is the case and showcases a sample channel diagram, waveforms and an off-the-shelf linear redriver from Diodes, Inc.
DisplayPort: The Perfect A/V Solution
Like Ethernet, HDMI and PCI Express, DisplayPort (DP) is a multi-Gbps serial channel that transmits data in packets. But unlike other packet protocols such as USB that embed the clock with the differential pair’s bit stream (the “channel”), DP instead uses micro packets. The clock is embedded within the micro packet, thus detaching the DP protocol from the channel itself—allowing the standard to evolve as the physical channel technology evolves. Yet, DP still assumes the channel can support the required data rate and signal waveforms. This unique separation between protocol and the assumed-to-work channel can be a strong benefit for DP installations while simultaneously creating challenges for hardware designers.
DisplayPort’s main link contains up to four channels plus an auxiliary sideband channel used for synchronizing devices based upon channel conditions. A significant advantage of DP for high resolution video is that fewer pins (channel pairs) are needed for video and audio, and that new capabilities can be added to DP without undue consideration for the physical (channel) interface.
According to Wikipedia, DP can transmit audio and video simultaneously. Each video color channel (RGB) can range from six to sixteen bits of depth, and up to eight audio channels of 24-bit, 192 KHz uncompressed PCM audio can be sent. It’s fair to say that DP is a very capable A/V “pipe” for high-res information. And DP’s micro packets make it ideal for long cable runs—as long as signal integrity is kept closely in mind.
The DP Channel
DisplayPort’s PHY is passive copper, with a bandwidth of 5.4 Gbps (DP 1.2) or up to 8.1 Gbits/s (DP 1.4). The high bit rate (HBR3) version 1.4 is planned for 2017. Because of these speeds, backwards compatibility, and the range of cables and connector types—including passive adapters to other standards like HDMI—the DP sideband channel is used for automatic link training.
A notional DisplayPort 1.4 channel is shown in Figure 2. The signal source is created by a transmitter on the system PCB, and signals are sent via traces to one or more connectors then to a cable or flex cable assembly. The signal has already degraded by Point 1 as the fuzzy eye diagram shows. Further away from the source down the cable, the eye is sufficiently closed at Point 2 that proper data packet reception is impossible.
Figure 3 shows a notional channel loss of -22.1 dB for the channel depicted in Figure 2; this much insertion loss—and the completely closed eye shown in Figure 2 at Point 2—means that no DP data will be successfully received at the destination.
As mentioned previously, the DP protocol uses data packets with embedded clocks. These packets are transmitted on the main channel link, while a dual-simplex auxiliary channel is used for link management via a link training protocol roughly similar to one used in PCI Express Gen 3. This is depicted in Figure 4, taken from the “VESA DisplayPort Standard” Version 1, Revision 1a.
Figure 5 shows how redrivers or retimers can be used to improve the SI problems noted in Figures 2 and 3. The linear redriver differs from the limiting redriver in that it has programmable De-emphasis (DE), and the linear redriver precisely matches the incoming signal when properly programmed. A linear redriver—two types are shown on the left side of Figure 5—is a two-stage amplifier that provides both channel equalization and gain.
On the right in Figure 5 is a simple retimer, similar to a redriver but with the ability to recover, resynchronize and retransmit signals with the embedded clock. An advanced retimer, also shown on the right, is useful for longer channels and adds adjustable equalization, clock data recovery and Decision Feedback Equalization (DFE).
Link Training Presents Problems
In principle, either a redriver or a retimer should be able to clean up the insertion loss, jitter, crosstalk, and other signal integrity challenges associated with the ~8.1 Gbps DP 1.4 signals. But DP’s auxiliary channel, which is designed to tune the transmitter to the channel’s characteristics and improve SI, actually becomes a hindrance with basic limiting redrivers. Figure 6 shows why.
DisplayPort “snoops” the auxiliary channel and receives input from the link training process. Based upon this input, limiting redrivers add boost at each stage in the channel, automatically adjusting (via programmable EQ and pre-emphasis) if link training does not succeed.
These limiting redrivers run open loop, have no communication with each other to pass link training information, and are usually from different vendors. In Figure 6 for example, the DP signal leaves the source PCB on the left and the redriver adds equalization and de-emphasis (DE) at the cable source. Embedded within the active cable itself, another redriver will again respond to the same link training signals and add additional EQ and DE. Finally, at the destination end, the receiving redriver will again add EQ and DE.
These three notional stages shown in Figure 6 are additive in a condition known as cascading connections, resulting in a triple redriver “boost” well above the SI target for this complete channel. The consequence is a collection of waveforms throughout the channel that do not meet the desired link training goals, and the channel will not be correctly matched for the DP protocol. It’s anyone’s guess what the eye diagram at the destination will look like.
Table 1 shows a comparison between the three types of signal integrity (SI) amplifiers we’ve been discussing.
Comparison: Redriver, Retimer, Linear Redriver
Instead of using limiting redrivers or retimers, the solution to this problem is to use a linear redriver that is most cost-effective, independent of the AUX channel and programmed by the hardware designer in advance based upon the known channel(s) characteristics.
Designed specifically for link training protocols in standards like PCI Express and DisplayPort, a linear redriver exactly matches the incoming waveform, only adding de-emphasis and equalization in order to create a 1:1 mapping of the incoming waveform. The differences between limiting redrivers compared to a linear redriver is clearly shown in Figure 7. In the bottom waveforms, note how the linear redriver precisely matches the rise and fall patterns of the source waveforms for the DP signals (red) and for the auxiliary channel (pink).
The result at every stage of the cascade connection channel from Figure 6 is shown in Figure 8. Linear redrivers correct the SI challenges of the waveform at each discontinuity (connector, channel, connector) but the channel loss cancellation is 0 dB; that is, the linear redriver adds no boost and is not responding to input from the AUX channel.
Real World Example
A real world example using a linear redriver for DisplayPort 1.2/1.3/1.4 is a laptop computer and an active DisplayPort dongle/cable (Figure 9). The author recently installed this very set-up, and this article is being written on dual 4K UHD monitors driven by active DisplayPort cables. At the source side (laptop) resides the Pericom PI3DPX1203 DisplayPort 1.4 linear redriver. Because of the DP connection on the laptop, the cable connector, and the meter-long cable, another PI3DPX1203 is installed at the cable’s origin—making this an “active” DP cable. These cables are not fantasy; they are readily available on Amazon, Monoprice and other popular online sites.
Capable of speeds up to 8.1 Gbps (DP 1.4) and four channels, the DP linear redriver supports the transparent link training described above; that is, no AUX link training is required. The laptop and cable designers can program the linear redriver to the notional channel conditions via pin-strapping or in-system I2C. The linear redriver not only amplifies the signals as required (gain), additive jitter performance and linear equalization can be programmed.
More importantly, the PI3DPX1203 is easily programmed for the cascade connection use case that’s common in DP configurations. As USB Type-C connectors become more prevalent in consumer devices, it is expected that DP (along with USB 2.0, 3.0, 3.1, Thunderbolt and HDMI) will be run on the Type-C’s side channel. This particular DP linear redriver is designed to accommodate the Type-C source and sink side configurations along with the USB Power Delivery (PD) controllers that use AUX link training transparent mode support.
In short: solving signal integrity (SI) challenges in DisplayPort (DP) systems merely requires a linear redriver such as PI3DPX1203 from Pericom – A product line of Diodes Incorporated.
This article was sponsored by Pericom – A product line of Diodes Incorporated.