Developing MEMS for Volume Manufacturing, Part Two



More on preparing devices for the rigors of the manufacturing environment

Editor’s Note: In the first of a three-part series, the authors surveyed the MEMS volume manufacturing landscape. This second article in the series covers designing for testing and data gathering as well as for package and system integration, with the concluding article offering guidance on fabrication of advanced prototypes and on the process of transfer to the foundry.

Adapted with permission from Translational Engineering: Best Practices in Developing MEMS for Volume Manufacturing[1]

MEMS-based inertial sensors, accelerometers and gyros will help enable autonomous driving. (Chrysler Pacifica Hybrid minivan undergoing testing in Los Altos, California. Credit: Dllu)

Designing for Testing and Data Gathering
Testing is essential for evaluating a prototype and designing it for manufacturability. In a wafer manufacturing process, there are three opportunities for testing: in-line testing, back-end-of-line (BEOL) wafer testing, and package testing. In-line testing occurs during wafer processing. BEOL testing is done after the wafer process is completed. Package testing takes place after the devices have been singulated from the wafer and mounted into packages.

Timeliness Versus Quality
Information timeliness versus information quality bears careful consideration. Information obtained during the manufacturing process can identify defective devices or wafers early on, when less money has been spent. On the other hand, the highest quality information comes at the end of manufacturing, during the final package test when the device is tested under conditions of realistic use; however, this is also the point at which the device is most valuable.

A test plan is essential, and for an advanced prototype, these different testing points and their tradeoffs and relative costs must be considered. Planning ensures that an advanced prototype will incorporate any special features or structures needed to facilitate testing and that sufficient test wafers will be available for any destructive tests. In-line testing may be nondestructive or destructive. An example of nondestructive testing is midprocess electrical probing to verify that a process step has been correctly completed. A typical probe test would measure the resistivity between two contact points after a metal deposition step. After testing, the wafer would resume its process flow.

A common example of destructive in-line testing is scanning electron microscopy (SEM) of a device cross section. A wafer would be removed from the process batch and cleaved or sawed to expose its cross section. To facilitate this type of inspection, test structures must be designed so that their cross sections can be easily cut, with multiple structures arranged on the wafer for exposure by a single cut. Ideally, this type of test structure would also be closely spaced so that a single SEM observation could image multiple structures simultaneously.

After a wafer is completed, the test data quantity and quality increase owing to the use of automated wafer electrical probing. In automated probing, every device on a wafer may be electrically stimulated and measured to accumulate a large volume of data. Often, high-level device functions can be evaluated by wafer probing. For example, an accelerometer’s sensitivity may be estimated by measuring the slope of its capacitance–voltage (C–V) response. An input voltage is applied to an accelerometer, and then its output capacitance measured. The capacitance changes may be on the order of femtofarads or smaller, and they must be measured in the presence of parasitic capacitances that are typically orders of magnitude larger. Designing an advanced prototype to facilitate these tests could include methods to electrically isolate the structures under test, such as surrounding the devices with a Faraday cage of known voltages or arranging differential readout to isolate the test signal.

Investigating and Characterizing More Behaviors
Once a chip is packaged, many more device behaviors may be investigated and characterized. Some behaviors, for example the temperature response of a device, can only be evaluated in the package. The thermal response of a MEMS device is strongly dependent on the packaging, since the package is usually made of a material that has a coefficient of thermal expansion different from that of silicon. Only after the device has been packaged can thermally induced strain effects be measured and characterized.

An advanced prototype must, at minimum, have a bond pad layout and footprint compatible with the intended package. This means that before wafer layout and processing occur, some careful thought must be given to package choice and the types of tests to be performed on the package.

Designing for Package and System Integration
A package’s primary function is to mechanically and environmentally protect the MEMS die while providing electrical contact and enabling any input or output stimulus to reach or exit the die. Package design is rarely considered thoroughly during academic research, because at that stage bare die testing suffices for gathering data. But successful commercialization demands that package design and assembly be seen as always-critical parts of translational engineering development, because the MEMS must function when installed in a circuit board or other system.

Expense Causes
The package is an expensive part of MEMS devices and can account for more than 70% of the total manufacturing cost. In wafer form, the manufacturing costs are spread among all the dies on the wafer, which may number in the tens of thousands. However once the MEMS dies are singulated from the wafer further manufacturing costs instead scale on a per die basis—thus the high proportional expense. Yield loss at the package stage is therefore quite expensive.

Another reason for packaging expense is that MEMS devices are partially mechanical in nature, and the mechanical environment that the package presents to the die must also be well engineered. MEMS devices respond to mechanical changes, such as the stress in the membrane of a pressure sensor, or a dimensional change, such as a capacitive gap in an accelerometer. These changes may also be induced by mechanical forces originating from the packaging. As a result, the package can act as a strong error source for the device.

Opportunity to Add Value
There are several approaches to managing the package’s effect on device performance. One is to prevent or minimize any mechanical input from the package. This requires the selection of stiff packages that do not flex or bend easily, which usually translates to large and expensive packages. An alternative approach is to mechanically isolate the MEMS device from the package or even within the die. The MEMS die may be attached to the package in a way that does not transmit package stresses to the die, such as using a soft polymer to attach the die.

Additionally, a clever device design could isolate the MEMS device from external influences. A common isolation technique for resonators, for example, is to collocate the resonator’s anchors at a single point to minimize mechanical cross-talk.

The packaging also provides an opportunity to add value to the MEMS when developing an advanced prototype. For example, a design that accommodates specialized packaging would enable a MEMS sensor to operate inside the human body, such as the 1 French (0.33 mm diameter) guidewires that enable in vivo blood pressure measurements within the cardiovascular system.

The challenge of MEMS packaging increases with the complexity of the physical input or output with which it interacts. For example, packaging for a MEMS microphone must allow an acoustic wave to reach the MEMS sensor, while simultaneously protecting the microphone from factors such as water, particles, mechanical shock, and temperature variation. In this case, the MEMS die itself could be engineered to withstand some of these adverse environmental effects.

For example, when developing an advanced prototype, one might also experiment with using a water-repellent coating to protect the surface of the microphone.

Cost Considerations
While keeping in mind all of the attributes described above, the advanced prototype must also demonstrate that it can be manufactured at a reasonable cost, consistent with its business model. Although increased wafer volume (thanks to economy of scale at the foundry) may eventually decrease production cost significantly (to 25–50%), the advanced prototype must immediately demonstrate the correct order of magnitude cost.

For example, if the business model requires a cost of $3/unit, the advanced prototype should cost no more than $10/unit, with the expectation that volume production will eventually reduce the cost from $10/unit to $3/unit, over time. An advanced prototype that costs $100/unit will never be able to reach $3/unit; the economy of volume manufacturing cannot bridge that large a gap.

One of the major drivers of cost is chip size. Foundries charge per wafer, not per chip. Decreasing chip size therefore increases the number of chips per wafer and is therefore a big lever to reduce cost. The advanced prototype must be made as small as feasible.

Other significant drivers of costs are use of single-wafer process steps that cannot be easily reworked, for example, deep reactive ion etching (DRIE) and wafer bonding. Both processes have low throughput (wafers processed per hour) because only a single wafer is processed at a time in the tool, and the process itself can be slow (up to hours). Furthermore, process deviation or failure in either of those processes will result in loss of the entire wafer. Use of expensive start materials, such as silicon-on-insulator (SOI) wafers or high-resistivity float-zone silicon wafers, may also contribute significantly to the cost and should be eliminated or substituted, if the device physics allows.

Finally, device yield (the percentage of good chips per wafer) is also a strong driver of chip cost. Engineering a design and process flow to fit comfortably within fab process tolerances is fundamental to keeping the yield high. Designs that depend on tight process tolerances will yield poorly, and will, by definition, be expensive.

[1] Sensors and Materials, Vol. 30, No. 4 (2018) 779-789 MYU Tokyo


The authors are employed by A.M. Fitzgerald & Associates, LLC (www.amfitzgerald.com), a MEMS product development company located in Burlingame, CA, USA. Corresponding author email: amf(at)amfitzgerald.com

 

 

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