October - 2015
- Choosing the Right Cooling Methodology for OpenVPX™ Deployments
Which chassis cooling methodology is best for your application? This paper summarizes the basic chassis-level cooling methodologies that are commonly used with VPX: air, conduction, liquid, convection, heat exchangers and more. It provides you with the strengths and weaknesses of each methodology and offers guidance on which to choose.
- ATCA for Military, Aerospace and Other High Performance Embedded Computing Users
This paper addresses the forces driving the requirements of high performance embedded computing (HPEC) for military and aerospace applications, including the modular open system approach (MOSA), commercial-off-the-shelf (COTS), and reduced size, weight, power and cost (SWaP-C) as it applies to ATCA. The paper assumes a basic understanding of AdvancedTCA. An introduction to the technology is provided in the Artesyn Embedded Technologies white paper, "ATCA Yesterday, Today and Tomorrow."
- Image Pipeline Tuning - The Road to Ultimate Image Quality
This whitepaper is an introduction to image pipeline tuning for achieving best image quality for various combination of sensor and lens with varied lighting conditions in any camera based applications. It also covers issues with respect to image quality and care to be taken into consideration while evaluating the same.
September - 2015
- High-speed Switched Serial Fabrics Improve System Design
This handbook reviews the development of gigabit serial fabrics to enhance system optimization; the role of FPGAs to implement this technology; and how some of the latest products can be used in high-speed data acquisition, recording and SDR systems.
- Metadata Handling in Rugged Embedded Video Compression Systems
In many situations, information is useless without information about the information. Thatâs where metadata comes in: it can give context and meaning to, for example, captured video. This white paper describes how a recent update to the highly flexible architecture of GEâs ICS-8580 video compression board uniquely provides it with a metadata engine, making it substantially more powerful in its ability to deliver actionable intelligence.
- Knock Out Designs Quickly With Layout vs Schematic Comparison
Manage performance, database size and accuracy before, during and after design. Download your free whitepaper to learn how the new Calibre nmLVS boxing capabilities help manage these trade-offs by allowing:
- Proper usage of regular, black and gray boxing options including strict hierarchy preservation on the black and gray boxed cells
- Management of IP, missing IP and incomplete blocks during design development
- Running of circuit verification and downstream processes ensuring IP and macro cell blocks hierarchy are not altered
July - 2015
- Gaining Precision in Space Applications: Using Voltage References for Precision Signal Paths
Often when selecting a component in the signal path of a satellite system, it is difficult to find a device with the radiation tolerance and the accuracy required. Signal integrity
June - 2015
- Using an Embedded Vision Processor to Build and Efficient Object Recognition System
The advent of high-performance mobile computing platforms is driving rapid progress in computer vision capabilities. Machine vision is becoming embedded in highly integrated SoCs and
- Selecting a Bus Analyzer 101
As avionics buses on military and commercial aircraft become more varied and complex, a bus analyzer has become an important tool for use during integration, validation, deployment,
- RAR-XMC Capabilities Overview
In dynamic development and production test environments where multiple flight computers are supported, patch panels have been the typical implementation for migrating between different
- The Intelligent Flexible Cloud White Paper
This ARM white paper describes "The Intelligent Flexible Cloud" which is enabled by new technology standards, heterogeneous system on chip (SoC) architectures, and distribution of
May - 2015
- Classification of Objects from Video Streams
Imagine a world in which brilliant machines âunderstandâ whatâs around them â and communicate that understanding to other brilliant machines, making each of them collectively smarter. Todayâs technology innovations are driving the object classification algorithms of tomorrowâs brilliant machines. This paper illustrates how the edge nodes of the network can interact with a variety of real world sensors then apply the âcollective learningâ, such that the experience of an individual machine contributes to the learning of the whole.
- PCI Express 4.0 Controller Design and Integration Challenges
Designers need to start planning for PCI Express 4.0 integration now, because decisions for the PCIe 4.0 controller can have far-reaching consequences for the entire SoC. This paper
- Virtualizing Cloud Computing With Optimized IP for NFV SoCs
Growing internet traffic impacts how cloud and carrier data center operators design compute and data networking architectures. To meet demands for scale-out servers and networks, designers
- Real-Time Trace: A Better Way to Debug Embedded Applications
Problems in the late phases of firmware and software development can be difficult to identify and debug, putting project schedules at risk. Learn how real-time trace hardware assistance
- Rapid Architectural Exploration in Designing Application-Specific Processors
Application-specific processors deliver high performance and energy efficiency with flexibility to address late specification changes and post-silicon modifications. Learn how Synopsysâ
April - 2015
- Ethernet in the Connected World
Read about the latest networking trends across some of the key market sectors including automotive, the connected home and data centers, and explains how Ethernet is relevant to each.
- Addressing IP Integration & Software Development Challenges to Accelerate SoC Time-to-Market
This white paper explores the issues facing SoC designers as they address SoC complexity and time-to-market challenges. High-quality IP alone is not enough with todayâs SoC complexity.
- A Method to Quickly Assess the Analog Front-End Performance in communication SoCs
Read about a method to determine if the electrical characteristics of any given AFE are adequate for the targeted application. Also, learn about a tool to explore tradeoffs between
- USB 3.1: Evolution and Revolution
This white paper digs into 10G USB 3.1 to clarify the evolutionary and revolutionary changes in the specification. USB 3.1 introduces a 10 Gbps signaling rate in addition to other features.
- Parasoft Embedded Testing Starter Kit
Static code analysis, runtime memory monitoring, unit testing, and flow analysis are all valuable techniques for finding bugs in embedded C-based software. On its own, each technique can help you find specific types of errors. Applying just one technique or applying the techniques in isolation, however, may allow bugs to slip through the cracks. The safest, most effective strategy is to apply all of these complementary techniques as part of a complete process. This establishes a bulletproof framework that helps you detect bugs that can evade specific techniques, while preventing future defects in your application. By applying a defect prevention strategy based on several quality activities, you create an environment for eliminating critical and difficult-to-detect functional problems.
March - 2015
- DDS: the Right Middleware for the Industrial Internet of Things?
Introducing a networking protocol DDS. Serving as the connectivity platform for real-world Industrial Internet of Things applications in medicine, transportation, energy, SCADA and
- On-chip Networks Optimize Shared Memory for Multicore SoCs
Performance of multicore SoCs is often dominated by external DRAM access, particularly in digital consumer devices running high quality video and graphics applications. Increasing core counts and newer DRAMs make the problems much more difficult. This article covers optimization of the on-chip network and memory system to achieve the required system throughput.
- High-Performance Analog and RF Circuit Simulation
The research group led by Professor Peter Kinget at the Columbia University Integrated Systems Laboratory (CISL) focuses on cutting edge analog and RF circuit design using digital nanoscale CMOS processes. Key challenges in the design of these circuits include block-level characterization and full-circuit verification. This paper highlights these verification challenges by discussing the results of a 2.2 GHz PLL LC-VCO, a 12-bit pipeline ADC, and an ultra-wideband transceiver.
- Efficient Noise Analysis for Complex Non-Periodic Analog/RF Blocks
This paper describes how AFS Transient Noise analysis enables circuit designers to efficiently perform SPICE-accurate device noise analysis on complex non-periodic analog/RF blocks. This capability enables designers to measure and optimize device noise analysis on complex blocks such as ADCs, frac-N PLLs, and int-N PLLs which would not otherwise have been possible without silicon iterations.
- A Methodology for High-Speed Nanometer Transceiver Verification, Validation, and Characterization
This paper describes a new circuit validation and characterization flow that enables users to easily set up, run, record pass/fail, and analyze very complex tests. The validation and characterization flow was standardized across the design team, leveraging knowledge and computing resources and significantly improving design productivity.
February - 2015
- White Paper: Overcome the Challenges of Crafting a Customized Computer
Mixing Standards for Solutions in COM Express Whether they're powering a map-sensor payload for a Global Hawk UAV or a man-pack radio system for a soldier on the move, custom computer solutions have to be small and lightweight. Oh, and while you're at it, make them ruggedized, constant in temperature, power efficient, and inexpensive.
January - 2015
- Transforming the Military Embedded Computing Landscape
This white paper describes the key market drivers, technologies and building blocks that the military is increasingly embracing from the commercial world that provide a clear path to increased operational capabilities within the size, weight and power (SWaP) constraints that are a feature of todayâs most demanding programs.
- Migrating Consumer Electronics to the Automotive World
Tough reliability standards for electronic automotive safety systems ensure that integrated circuits (ICs) comply with demanding performance and reliability requirements. These same IC reliability verifications tools can be used to validate circuit operation for "infotainment" and "connected car" applications, and ensure that customer reliability expectations are satisfied. Download your free report to learn how to: * Leverage existing IP for use in high-reliability applications * Provide automation for manual IC verification steps in your design flow * Improve existing coverage of IC reliability verification
- Virtual Video Transcoding in the Cloud
The increasing density and high-quality processing demands from video applications is pushing broadcast and communications networks to the limit. Adding more equipment to handle these video streams is not economically viable. Whatâs more, operators, service providers and content providers see the benefits of using standard servers in the cloud, and want to move away from special appliances or dedicated hardware. But standard servers currently are not optimized for video transcoding in the cloud.