No one doubts that the global market for all things wireless will continue to grow.
Wireless connectivity in both voice and data-based systems is spanning the globe.
Data-intensive wireless systems range from personal area network technologies based on
Bluetooth and UWB protocols to longer range designs like the IEEE 802.11 family and WiMax
network systems. All of which means that analog, RF and wireless design challenges have
moved to the forefront of both chip and board level design concerns.

Perhaps few companies are better poised to address both the chip and board level issues facing analog-RF-wireless engineers than Cadence Design Systems (www.cadence.com). Recently, I had the opportunity to interview experts in both Cadence’s North America and China headquarters. Their insights reflect the universal problems faced by RF designers.

The problem in designing board-level RF systems is twofold. The first challenge
involves implementing the RF circuit with the existing digital design onto an already
crowded printed circuit board (PCB). The second obstacle – often “clock” noisy – deals
with the signal interference issues common to multi-RF front-end systems. Let’s start with
the board-level challenge.

RF Board-Level Challenges

Whether realizing an RF circuit on a silicon chip or PCB, the first step is to model,
simulate and design the circuit. There are a host of specialized software tools to help
engineers create the necessary design. But once designed, how are these circuits
implemented on a board?

To answer this question, you first must understand that two distinct design data
formats are involved; one for the board and a different one for the RF circuit. As Josh
Moore, Senior Product Manager for PCB design tools at Cadence Design Systems
explains; “The problem is one of data interoperability, i.e., getting information from the
design and analysis tools into the tools that can actual create the physical circuit
board.”

Most board designers are familiar with PCB data formats, like Gerber or GenCAD. But in
what format are specific RF circuits captured? Most data comes out of the RF simulation
and design tools in a format known as the Intermediate File Format (IFF) – see
figure. This format permits the bi-directional flow of data from schematic and layout
design tools. It contains all the RF front-end logic information for a particular circuit,
as well as the back-end RF physical elements. Board-level CAD tools use this information
to properly place the circuit onto an RF-only or mixed domain (RF and digital) board.

But all is not as straight-forward as it seems, notes Josh. “In the past, these tools
lacked a highly integrative solution. For example, imagine that a mounting hole was
mistakenly added right in the middle of your transmitter circuit. To fix this mistake on
the board, you had to move the antenna, which could easily change the RF electrical
characteristics of the circuit. Such a change would mean the circuit must be
re-simulated.” But there was no easy way to get these changes back into the simulators,
aside from verbally explaining to the RF engineer what specific changes were needed from
the board designer’s perspective. The RF engineer would then have to recreate the changes
and redo the simulation, hopefully with favorable results.

In the past, board design CAD tools have looked upon RF designs as black boxes. The IFF
data explained what the RF designer intended, but CAD tools typically didn’t understand
the RF elements. For the CAD designer, this RF “black box” was little more than physical
elements, like copper construction pieces which could be a duct or exploiter, explains
Josh. “It could be whatever RF element the circuit is trying to make happen.” The CAD
designer would just accept whatever data came from the tool, little knowing which RF
functions were to be performed by the various collections of copper elements.

RF Circuit Issues

We’ve highlighted some of the problems associated with importing RF design data into the
established PCB CAD tools. But how do engineers know that the board-level implementation
will work as well as on the simulators? Mr. Xiao, Product Engineer for Cadence in
Shanghai, China, notes that the biggest challenges are electromagnetic interference (EMI)
and electromagnetic compatibility (EMC). These challenges arise because most RF designs
will go into consumer products – mobile phones, wireless networks – that must meet
FCC and European standards. So designers must be able to identify, locate, assess, and
resolve EMI and EMC issues before the product can be manufactured.

By their very nature, EMI and EMC problems are often very difficult to trace it to a
single cause. This inability to completely define the complete context of the EMI-EMC
problem makes it very hard to simulate. Mr. Xiao agrees, noting that EMI-EMC challenges
are really system level issues that involve such factors as mechanical structure,
functionality, layout, power disturbance, heat sinking and so on.

Another design challenge involves the growing need to support multiple RF subsystem
protocols such as Bluetooth and Wi-Fi, among others. Incorporating multiple RF front-end
designs into consumer products
is a popular way to add more features, shrink existing form factors, reduce overall
weight, consume less power and lower systems costs. Unfortunately, multiple RF front-ends
present a number of trade-offs, since the coupling the signal paths on the board can
degrade system performance, while separating them can result in higher cost.

Mr. Xiao observes that still another issue facing RF designers is a lack of proper
design environment and tools. Organizational
structure and tool provisioning have not evolved to facilitate the design trend to combine
RF and digital features on the same board. RF design team and digital design team continue
to often be two separate groups, each having its own set of equipment.

On the process side of the development issue, analog-RF-wireless designs have never
scaled into smaller silicon sizes as easily as digital designs. Technological advances
– like direct down conversion or Zero Intermediate Frequency (IF) – have helped
to reduce the size of RF front-ends. Today, traditional super-heterodynes and Zero IF
architectures co-exist on the same board but for different applications. While super-het
architectures are more widely used in classic designs, Zero IF approaches offer the
advantage of reduced parts count which saves board space and enables smaller form factors.
Zero IF technology is now being widely accepted. Mr. Xiao believes it will be the future
direction for all RF front–end applications.

What can be done to address all of the challenges, starting with the data format
interoperability? More and more software vendors are providing better bi-directional
mechanisms to exchange data between simulation, design and testing tools. Some of these
tools even provide reuse functionality.

While RF and digital designers continue to operate in separate camps, both know they
have to co-exist together in order to survive in the marketplace. Mixed domain technology
advancements that require the mixing of both analog and digital signals onto a single
board help encourage a healthy respect for each other’s point of view.

As they become more knowledgeable of the inherent challenges that the other faces, i.e.
RF designers with electromagnetic field issues, digital designers with electrical circuit
issues, they become more tolerant and accepting of the other’s position.

Another factor that encourages this sharing of perspectives has resulted from college
courses that integrate both analog and digital disciplines in the same curriculums.
Companies have followed this example by cross-training their engineers.

Perhaps the best motivator for the closer integration of RF and digital designs –
and design teams – is the growing global market for wireless products. But meeting
shrinking board sizes and time-to-market demands means that RF circuit and board designs
must have an accurate and efficient bi-directional data flow. Fortunately, this seems to
be a high priority for both chip- and board-level EDA companies.

Sample list of tools:

1) Board design-layout tools: Cadence’s Allegro RF PCB platform, including Board Station, ADS, HFSS for RF design and simulation (www.cadence.com)

2) Simulation and design tools: Microwave Designer, from Applied Wave Research (www.appwave.com)

3) Testing tools: BTG’s Bird Diagnostic System (BDS); Agilent ADS (www.agilent.com)

John Blyler,

Editorial Director